參數(shù)資料
型號(hào): CY7C1011CV33-15ZI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 128K x 16 Static RAM
中文描述: 128K X 16 STANDARD SRAM, 15 ns, PDSO44
封裝: TSOP2-44
文件頁(yè)數(shù): 1/11頁(yè)
文件大?。?/td> 284K
代理商: CY7C1011CV33-15ZI
128K x 16 Static RAM
CY7C1011CV33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
, CA 95134
408-943-2600
Document #: 38-05232 Rev. *C
Revised June 30, 2005
Features
Pin equivalent to CY7C1011BV33
High speed
—tAA = 10 ns
Low active power
— 360 mW (max.)
Data Retention at 2.0
Automatic power-down when deselected
Independent control of upper and lower bits
Easy memory expansion with CE and OE features
Available in 44-pin TSOP II, 44-pin TQFP, and 48-ball
VFBGA
Also available in Lead-Free 44-pin TSOP II and 44-pin
TQFP packages
Functional Description
The CY7C1011CV33 is a high-performance CMOS Static
RAM organized as 131,072 words by 16 bits.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O0 through I/O15) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1011CV33 is available in a standard 44-pin TSOP
II package with center power and ground pinout, a 44-pin Thin
Plastic Quad Flatpack (TQFP), as well as a 48-ball fine-pitch
ball grid array (VFBGA) package.
14
15
Logic Block Diagram
Pin Configuration
A1
A2
A3
A4
A5
A6
A7
A8
COLUMN
DECODER
ROW
DE
CODE
R
SE
NS
E
A
M
P
S
INPUT BUFFER
256K x 16
ARRAY
A0
A
11
A
13
A
12
A
16
A
9
A
10
1024 x 4096
I/O0–I/O7
OE
I/O8–I/O15
CE
WE
BLE
BHE
WE
1
2
3
4
5
6
7
8
9
10
11
14
31
32
36
35
34
33
37
40
39
38
Top View
TSOP II
12
13
41
44
43
42
16
15
29
30
VCC
A15
A14
A13
A4
A3
OE
VSS
A5
I/O15
A2
CE
I/O2
I/O0
I/O1
BHE
NC
A1
A0
18
17
20
19
I/O3
27
28
25
26
22
21
23
24
NC
VSS
I/O6
I/O4
I/O5
I/O7
A6
A7
BLE
VCC
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
A8
A9
A10
A11
A12
A16
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參數(shù)描述
CY7C1011CV33-15ZXC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 2M-Bit 128K x 16 15ns 44-Pin TSOP-II
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CY7C1011DV33-10BVIKA 制造商:Cypress Semiconductor 功能描述:
CY7C1011DV33-10BVIT 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2M FAST ASYNC HI SPD 靜態(tài)隨機(jī)存取存儲(chǔ)器 IND RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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