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參數(shù)資料
| 型號： | CY7C1300A |
| 英文描述： | Memory |
| 中文描述： | 內(nèi)存 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 194K |
| 代理商： | CY7C1300A |
CY7C1019B/
CY7C10191B
Document #: 38-05026 Rev. *A
Page 6 of 9
Write Cycle No. 3 (WE Controlled, OE LOW)[13]
Switching Waveforms (continued)
DATA VALID
tHD
tSD
tLZWE
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZWE
CE
ADDRESS
WE
DATA I/O
NOTE 14
Truth Table
CE
OE
WE
I/O0–I/O7
Mode
Power
H
X
High Z
Power-Down
Standby (ISB)
X
High Z
Power-Down
Standby (ISB)
L
H
Data Out
Read
Active (ICC)
L
X
L
Data In
Write
Active (ICC)
L
H
High Z
Selected, Outputs Disabled
Active (ICC)
Ordering Information
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
10
CY7C10191B-10VC
V33
32-Lead 400-Mil Molded SOJ
Commercial
12
CY7C1019B-12VC
V33
32-Lead 400-Mil Molded SOJ
Commercial
CY7C1019B-12ZC
ZS32
32-Lead TSOP Type II
Commercial
15
CY7C1019B-15VC
V33
32-Lead 400-Mil Molded SOJ
Commercial
CY7C1019B-15VI
V33
32-Lead 400-Mil Molded SOJ
Industrial
CY7C1019B-15ZC
ZS32
32-Lead TSOP Type II
Commercial
CY7C1019B-15ZI
ZS32
32-Lead TSOP Type II
Industrial
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1301A | Memory |
| CY7C130-25DC | x8 Dual-Port SRAM |
| CY7C130-25LC | x8 Dual-Port SRAM |
| CY7C130-25PC | x8 Dual-Port SRAM |
| CY7C1302V25 | Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1300A-83AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 4.5M-Bit 128K x 36 6ns 176-Pin TQFP |
| CY7C1301A WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1302BV25-100BZC | 制造商:Cypress Semiconductor 功能描述:9MB PIPELINE QDR SRAM 2.5V CORE, FBGA, 2 WORD BURST - Trays |
| CY7C1302BV25-133BZC | 制造商:Cypress Semiconductor 功能描述:9MB PIPELINE QDR SRAM 2.5V CORE, FBGA, 2 WORD BURST - Trays |
| CY7C1302BV25-167BZC | 制造商:Cypress Semiconductor 功能描述:9MB PIPELINE QDR SRAM 2.5V CORE, FBGA, 2 WORD BURST - Trays |
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