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參數(shù)資料
| 型號： | CY7C136-15NC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | Hookup wire; Conductor Size AWG:20; No. Strands x Strand Size:10 x 30; Jacket Color:Black; Approval Bodies:UL, CSA; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes RoHS Compliant: Yes |
| 中文描述： | 2K X 8 DUAL-PORT SRAM, 15 ns, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 339K |
| 代理商： | CY7C136-15NC |
CY7C132/CY7C136
CY7C142/CY7C146
4
Switching Characteristics
Over the Operating Range
[6, 11]
AC Test Loads and Waveforms
3.0V
5V
OUTPUT
R1893
R2
347
30 pF
INCLUDING
JIGAND
SCOPE
GND
90%
90%
10%
< 5 ns
< 5 ns
5V
OUTPUT
C132-5
R1893
R2
347
5 pF
INCLUDING
JIGAND
SCOPE
C132-6
(a)
(b)
OUTPUT
1.4V
Equivalent to:
TH VéNIN EQUIVALENT
5V
281
30pF
BUSY
OR
INT
BUSYOutput Load
(CY7C132/CY7C136 ONLY)
10%
ALL INPUT PULSES
250
Parameter
Description
7C136-15
[3,4]
7C146-15
Min.
7C132-25
[3]
7C136-25
7C142-25
7C146-25
Min.
7C132-30
7C136-30
7C142-30
7C146-30
Min.
Unit
Max.
Max.
Max.
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
WRITE CYCLE
[15]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
Read Cycle Time
Address to Data Valid
[12]
15
25
30
ns
15
25
30
ns
Data Hold from Address Change
CE LOW to Data Valid
[12]
OE LOW to Data Valid
[12]
OE LOW to Low Z
[10, 13]
OE HIGH to High Z
[10, 13, 14]
CE LOW to Low Z
[10, 13]
CE HIGH to High Z
[10, 13, 14]
CE LOW to Power-Up
[10]
CE HIGH to Power-Down
[10]
0
0
0
ns
15
25
30
ns
10
15
20
ns
3
3
3
ns
10
15
15
ns
3
5
5
ns
10
15
15
ns
0
0
0
ns
15
25
25
ns
Write Cycle Time
15
25
30
ns
CE LOW to Write End
12
20
25
ns
Address Set-Up to Write End
12
20
25
ns
Address Hold from Write End
2
2
2
ns
Address Set-Up to Write Start
0
0
0
ns
R/W Pulse Width
12
15
25
ns
Data Set-Up to Write End
10
15
15
ns
Data Hold from Write End
R/W LOW to High Z
[10]
R/W HIGH to Low Z
[10]
0
0
0
ns
10
15
15
ns
0
0
0
ns
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