參數(shù)資料
型號: CY7C1382BV25-133AC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 512K x 36 / 1 Mb x 18 Pipelined SRAM
中文描述: 1M X 18 CACHE SRAM, 4.2 ns, PQFP100
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
文件頁數(shù): 14/30頁
文件大?。?/td> 860K
代理商: CY7C1382BV25-133AC
CY7C1380BV25
CY7C1382BV25
PRELIMINARY
14
TAP Controller Block Diagram
0
0
1
2
.
.
29
30
31
Boundary Scan Register
Identification Register
0
1
2
.
.
.
.
x
0
1
2
Instruction Register
Bypass Register
Selection
Circuitry
Selection
Circuitry
TAP Controller
TDI
TDO
TCK
TMS
TAP Electrical Characteristics
Over the Operating Range
[5, 6]
Parameter
Description
Test Conditions
Min.
Max.
Unit
V
OH1
Output HIGH Voltage
I
OH
= –2.0 mA
1.7
V
V
OH2
Output HIGH Voltage
I
OH
= –100 mA
2.1
V
V
OL1
Output LOW Voltage
I
OL
= 2.0 mA
0.7
V
V
OL2
Output LOW Voltage
I
OL
= 100 mA
0.2
V
V
IH
Input HIGH Voltage
1.7
V
DD
+0.3
V
V
IL
Input LOW Voltage
–0.3
0.7
V
I
X
Input Load Current
GND < V
I
< V
DDQ
–5
5
mA
Notes:
5.
6.
All Voltage referenced to Ground.
Overshoot: V
IH
(AC)<V
DD
+1.5V for t<t
TCYC
/2. Undershoot:V
IL
(AC)<0.5V for t<t
TCYC
/2. Power-up: V
IH
<2.6V and V
DD
<2.4V and V
DDQ
<1.4V for t<200 ms.
相關PDF資料
PDF描述
CY7C1382BV25-133BGC 512K x 36 / 1 Mb x 18 Pipelined SRAM
CY7C1381C 18-Mb (512K x 36/1M x 18) Flow-Through SRAM
CY7C1381C-117AC 18-Mb (512K x 36/1M x 18) Flow-Through SRAM
CY7C1381C-117AI 18-Mb (512K x 36/1M x 18) Flow-Through SRAM
CY7C1381C-117BGC 18-Mb (512K x 36/1M x 18) Flow-Through SRAM
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