參數(shù)資料
型號(hào): CY8C24794-SPE
廠商: Cypress Semiconductor Corp.
英文描述: PSoCTM Mixed-Signal Array
中文描述: PSoCTM混合信號(hào)陣列
文件頁(yè)數(shù): 16/32頁(yè)
文件大?。?/td> 366K
代理商: CY8C24794-SPE
April 14, 2005
Document No. 38-12018 Rev. *F
16
CY8C24794 Final Data Sheet
3. Electrical Specifications
Table 3-8. 3.3V DC Operational Amplifier Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
V
OSOA
Input Offset Voltage (absolute value)
Power = Low, Opamp Bias = High
Power = Medium, Opamp Bias = High
High Power is 5 Volts Only
1.65
1.32
10
8
mV
mV
TCV
OSOA
Average Input Offset Voltage Drift
7.0
35.0
μ
V/
o
C
pA
I
EBOA
Input Leakage Current (Port 0 Analog Pins)
20
Gross tested to 1
μ
A.
C
INOA
Input Capacitance (Port 0 Analog Pins)
4.5
9.5
pF
Package and pin dependent. Temp = 25
o
C.
V
CMOA
Common Mode Voltage Range
0.2
Vdd - 0.2
V
The common-mode input voltage range is
measured through an analog output buffer.
The specification includes the limitations
imposed by the characteristics of the analog
output buffer.
G
OLOA
Open Loop Gain
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = Low
Power = High, Opamp Bias = Low
60
60
80
dB
V
OHIGHOA
High Output Voltage Swing (internal signals)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = Low
Power = High is 5V only
Vdd - 0.2
Vdd - 0.2
Vdd - 0.2
V
V
V
V
OLOWOA
Low Output Voltage Swing (internal signals)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = Low
Power = High, Opamp Bias = Low
0.2
0.2
0.2
V
V
V
I
SOA
Supply Current (including associated AGND buffer)
Power = Low, Opamp Bias = Low
Power = Low, Opamp Bias = High
Power = Medium, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = Low
Power = High, Opamp Bias = High
400
500
800
1200
2400
4600
800
900
1000
1600
3200
6400
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
dB
PSRR
OA
Supply Voltage Rejection Ratio
65
80
Vss
VIN
(Vdd - 2.25) or (Vdd - 1.25V)
VIN
Vdd.
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