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參數(shù)資料
| 型號(hào)： | D640H90VI |
| 廠商： | Spansion Inc. |
| 英文描述： | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| 中文描述： | 64兆位（8米× 8位/ 4米x 16位），3.0伏的CMOS只，同步讀/寫閃存 |
| 文件頁(yè)數(shù)： | 3/54頁(yè) |
| 文件大?。?/td> | 850K |
| 代理商： | D640H90VI |
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Publication#
27082
Issue Date:
June 7, 2005
Rev:
A
Amendment/
+7
Refer to AMD’s Website (www.amd.com) for the latest information.
Am29DL640H
64 Megabit (8 M x 8-Bit/4 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
DISTINCTIVE CHARACTERISTICS
for reference and historical purposes only.
ARCHITECTURAL ADVANTAGES
■
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in another bank.
— Zero latency between read and write operations
■
Flexible Bank
TM
architecture
— Read may occur in any of the three banks not being
written or erased.
— Four banks may be grouped by customer to achieve
desired bank divisions.
■
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
■
Manufactured on 0.13 μm process technology
■
Secured Silicon Sector: Extra 256 Byte sector
—
Factory locked and identifiable:
16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
—
Customer lockable:
One-time programmable only.
Once locked, data cannot be changed
■
Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
■
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
PACKAGE OPTIONS
■
63-ball Fine Pitch BGA
■
48-pin TSOP
PERFORMANCE CHARACTERISTICS
■
High performance
— Access time as fast as 55 ns
— Program time: 4 μs/word typical using accelerated
programming function
■
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
■
Minimum 1 million erase cycles guaranteed per
sector
■
20 year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
■
Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
■
Supports Common Flash Memory Interface (CFI)
■
Erase Suspend/Erase Resume
— Suspends erase operations to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation.
■
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
■
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
■
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
■
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
■
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1,
140, and 141, regardless of sector protect status
— Acceleration (ACC) function accelerates program
timing
■
Sector protection
— Hardware method to prevent any program or erase
operation within a sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
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