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參數(shù)資料
| 型號： | DAC312HSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/14頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT MULT HS 20SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 250ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 375mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | * |
DAC312
–12–
REV. C
One of the characteristics of an R-2R DAC in standard form is
that any transition which causes a zero LSB change (i.e., the
same output for two different codes) will exhibit the same out-
put each time that transition occurs. The same holds true for
transitions causing a 2 LSB change. These two problem transi-
tions are allowable for the standard definition of monotonicity
and also allow the device to be specified very tightly for INL.
The major problem arising from this error type is in A/D con-
verter implementations. Inputs producing the same output are
now represented by ambiguous output codes for an identical in-
put. Also, 2 LSB gaps can cause large errors at those input lev-
els (assuming 1/2 LSB quantizing levels). It can be seen from
the two figures that the DNL specified D/A converter will yield
much finer grained data than the INL specified part, thus im-
proving the ability of the A/D to resolve changes in the analog
input.
DIFFERENTIAL LINEARITY COMPARISON
D/A Converter with
±1/2 LSB INL, ±1 LSB DNL
Video Deflection by DACs
ENLARGED “POSITIONAL” OUTPUTS
D/A Converter with
±2 LSB INL, ±1/2 LSB DNL
Video Deflection by DACs
ENLARGED “POSITIONAL” OUTPUTS
DIFFERENTIAL VS. INTEGRAL NONLINEARITY
Integral nonlinearity, for the purposes of the discussion, refers
to the “straightness”of the line drawn through the individual re-
sponse points of a data converter. Differential nonlinearity, on
the other hand, refers to the deviation of the spacing of the adja-
cent points from a 1 LSB ideal spacing. Both may be expressed
as either a percentage of full-scale output or as fractional LSBs
or both. The following figures define the manner in which these
parameters are specified. The left figure shows a portion of the
transfer curve of a DAC with 1/2 LSB INL and the (implied)
DNL spec of 1 LSB. Below this is a graphic representation of
the way this would appear on a CRT, for example, if the D/A
converter output were to be applied to the Y input of a CRT as
shown in the application schematic titled “CRT Display Drive.”
On the right is a portion of the transfer curve of a DAC speci-
fied for 2 LSB INL with 1/2 LSB DNL specified and the
graphic display below it.
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