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    參數(shù)資料
    型號: DAC5674IPHP
    廠商: Texas Instruments
    文件頁數(shù): 1/39頁
    文件大?。?/td> 0K
    描述: IC DAC 14BIT 400MSPS 48-HTQFP
    產(chǎn)品培訓(xùn)模塊: Data Converter Basics
    標(biāo)準(zhǔn)包裝: 250
    系列: CommsDAC™
    設(shè)置時間: 20ns
    位數(shù): 14
    數(shù)據(jù)接口: 并聯(lián)
    轉(zhuǎn)換器數(shù)目: 1
    電壓電源: 模擬和數(shù)字
    功率耗散(最大): 550mW
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 48-TQFP 裸露焊盤
    供應(yīng)商設(shè)備封裝: 48-HTQFP(7x7)
    包裝: 托盤
    輸出數(shù)目和類型: 2 電流,單極
    采樣率(每秒): 400M
    產(chǎn)品目錄頁面: 898 (CN2011-ZH PDF)
    配用: 296-30860-ND - EVAL MODULE FOR DAC5674
    其它名稱: 296-15726
    296-15726-1
    296-15726-1-ND
    296-15726-5
    296-15726-5-ND
    DAC5674
    SLWS148A SEPTEMBER 2003 REVISED OCTOBER 2005
    14BIT, 400 MSPS, 2y/4y INTERPOLATING CommsDAC
    DIGITALTOANALOG CONVERTER
    8
    FEATURES
    D 200-MSPS Maximum Input Data Rate
    D 400-MSPS Maximum Update Rate DAC
    D 76-dBc SFDR Over Full First Nyquist Zone
    With Single Tone Input Signal (Fout = 21 MHz)
    D 74-dBc ACPR W-CDMA at 15.36 MHz IF
    D 69-dBc ACPR W-CDMA at 30.72 MHz IF
    D Selectable 2y or 4y Interpolation Filter
    Linear Phase
    0.05-dB Pass-Band Ripple
    80-dB Stop-Band Attenuation
    Stop-Band Transition 0.40.6 Fdata
    Interpolation Filters Configurable in Either
    Low-Pass or High-Pass Mode, Allows For
    Selection High-Order Images
    D On-Chip 2y/4y PLL Clock Multiplier, PLL
    Bypass Mode
    D Differential Scalable Current Outputs: 2 mA to
    20 mA
    D On-Chip 1.2-V Reference
    D 1.8-V Digital and 3.3-V Analog Supply
    Operation
    D 1.8/3.3-V CMOS Compatible Interface
    D Power Dissipation: 435 mW at 400 MSPS
    D Package: 48-Pin TQFP
    APPLICATIONS
    D Cellular Base Transceiver Station Transmit
    Channel
    CDMA: W-CDMA, CDMA2000, IS-95
    TDMA: GSM, IS-136, EDGE/UWC-136
    D Test and Measurement: Arbitrary Waveform
    Generation
    D Direct Digital Synthesis (DDS)
    D Cable Modem Termination System
    DESCRIPTION
    The DAC5674 is a 14-bit resolution, high-speed, digital-to-analog converter (DAC) with integrated
    4
    × interpolation filter, onboard clock multiplier, and on-chip voltage reference. The device has been designed
    for high-speed digital data transmission in wired and wireless communication systems, high-frequency
    direct-digital synthesis (DDS) and waveform reconstruction in test and measurement applications.
    The 4
    × interpolation filter is implemented as a cascade of two 2× interpolation filters, each of which can be
    configured for either low-pass or high-pass response. This enables the user to select one of the higher order
    images present at multiples of the input data rate clock while maintaining a low date input rate. The resulting
    high IF output frequency allows the user to omit the conventional first mixer in heterodyne transmitter
    architectures and directly up-convert to RF using only one mixer, thereby reducing system complexity and
    costs.
    In 4
    × interpolation low-pass response mode, the DACs excellent spurious free dynamic range (SFDR) at
    intermediate frequencies located in the first Nyquist zone (up to 40 MHz) allows for multicarrier transmission
    in cellular base transceiver stations (BTS). The low-pass interpolation mode thereby relaxes image filter
    requirements by filtering out the images in the adjacent Nyquist zones.
    The DAC5674 PLL clock multiplier controls all internal clocks for the digital filters and DAC core. The differential
    clock input and internal clock circuitry provides for optimum jitter performance. Sine wave clock input signal is
    supported. The PLL can be bypassed by an external clock running at the DAC core update rate. The clock
    divider of the PLL ensures that the digital filters operate at the correct clock frequencies.
    PRODUCTION DATA information is current as of publication date. Products
    conform to specifications per the terms of Texas Instruments standard warranty.
    Production processing does not necessarily include testing of all parameters.
    Excel is a trademark of Microsoft Corporation.
    CommsDAC and PowerPAD are trademarks of Texas Instruments.
    All other trademarks are the property of their respective owners.
    Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
    semiconductor products and disclaimers thereto appears at the end of this data sheet.
    www.ti.com
    Copyright
    2005, Texas Instruments Incorporated
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