- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376558 > DAC600 12-Bit 256MHz Monolithic DIGITAL-TO-ANALOG CONVERTER PDF資料下載
參數(shù)資料
| 型號： | DAC600 |
| 英文描述： | 12-Bit 256MHz Monolithic DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 12位256MHz單片數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 12/12頁 |
| 文件大小： | 155K |
| 代理商： | DAC600 |
DAC600
12
spur and noise performance by filtering out unwanted spur
and noise spectra. Even with a programmable bandpass
filter, care should be taken to update the DAC at greater than
4 times per cycle to (1) minimize the 2nd and 3rd harmonic
magnitudes by having the output slew excessively between
any successive clock and (3) to keep the 2nd harmonic and
other even order harmonics from folding back close to the
fundamental under the condition f
OUT
= 1/3 f
CLK
and (3)
to keep the 3rd harmonic and other harmonics from
folding back close to the fundamental under the condition
f
OUT
= 1/4 f
CLK
. The making use of the high update rate of
the DAC600 helps to lessen the problems of large harmonics
“folding back” into the passband.
For DDS applications, often the DAC itself is the limit in
Spurious Free Dynamic Range (SFDR) performance. How-
ever, due to the high linearity of the DAC600, low frequency
spurious performance may be limited by the digital trunca-
tion error of the phase accumulator/ROM combination.
Most vendors supplying a combination of phase accumula-
tor and ROM specify the SFDR of their digital algorithm.
FIGURE 7. Typical DAC600 Connection Diagram.
V
REF
H5
38
26
V
REF
39
H5
44
35
V
REF/2
47
ALTCOMPC
0.1μF
42
28
ALTCOMPIB
50
LBIAS
54
13
14
V
OUT
V
OUT
58
R
OFFSET
Bit 1 (MSB)
Bit 2
59
Bit 3
60
Bit 4
62
Bit 5
64
Bit 6
65
Bit 7
67
Bit 8
6
Bit 9
7
Bit 10
8
Bit 11
9
Bit 12 (LSB)
15
16
LGND
LGND
17
18
V
OUT
V
OUT
33
34
5
AV
EE
AV
EE
2
CLK
DV
EE
3
CLK
1
BYPASS
4
DGND
56
DGND
57
DGND
63
DGND
66
DGND
55
DV
EE
20
29
30
48
AGND
AGND
AGND
AGND
32
LOOPCRNT
DAC600
0.1μF
0.1μF
0.1μF
0.4μF
0.1μF
0.1μF
0.1μF
–5.2V
Supply
V
OUT
V
OUT
–5.2V
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
CLK
CLK
47
V
REF
(+1.000V)
Terminate
Unused Output
–5.2V
–5.2V
–5.2V
47
47
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC600 | 12-Bit 256MHz Monolithic Dightal-To-Analog Converter(12位 256MHz單片D/A轉(zhuǎn)換器) |
| DAC650 | 12-Bit 500MHz DIGITAL-TO-ANALOG CONVERTER |
| DAC650JL | 12-Bit 500MHz DIGITAL-TO-ANALOG CONVERTER |
| DAC650KL | 12-Bit 500MHz DIGITAL-TO-ANALOG CONVERTER |
| DAC650 | 12-Bit 500MHz Dightal-To-Analog Converter(12位 500M赫茲單片D/A轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC60004IDMDT | 功能描述:12 Bit Digital to Analog Converter 1 14-VSON (4x3) 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):新產(chǎn)品 位數(shù):12 Number of D/A Converters:1 建立時間:8μs 輸出類型:Voltage - Buffered Differential Output:無 數(shù)據(jù)接口:SPI 參考類型:內(nèi)部 電壓 - 電源，模擬:2.7 V ~ 5.5 V 電壓 - 電源，數(shù)字:2.7 V ~ 5.5 V INL/DNL (LSB):±1（最大），±1（最大） 架構(gòu):R-2R 工作溫度:-40°C ~ 125°C 封裝/外殼:14-VFDFN 裸露焊盤 供應(yīng)商器件封裝:14-VSON（4x3） 標準包裝:1 |
| DAC60096EVM | 功能描述:EVALUATION MODULE 制造商:texas instruments 系列:* 零件狀態(tài):在售 標準包裝:1 |
| DAC6012AD/883B | 制造商:Fairchild Semiconductor Corporation 功能描述:DAC6012AD/883 |
| DAC60508MRTET | 功能描述:8-CHANNEL, TRUE 12-BIT, SPI, VOL 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 位數(shù):12 數(shù)模轉(zhuǎn)換器數(shù):8 建立時間:5μs（標準） 輸出類型:Voltage - Buffered 差分輸出:無 數(shù)據(jù)接口:SPI 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:2.7 V ~ 5.5 V 電壓 - 電源，數(shù)字:1.7 V ~ 5.5 V INL/DNL（LSB）:±0.5，±0.5 架構(gòu):R-2R 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:16-WFQFN 裸露焊盤 供應(yīng)商器件封裝:16-WQFN（3x3） 標準包裝:1 |
| DAC60508ZRTET | 功能描述:8-CHANNEL, TRUE 12-BIT, SPI, VOL 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 位數(shù):12 數(shù)模轉(zhuǎn)換器數(shù):8 建立時間:5μs（標準） 輸出類型:Voltage - Buffered 差分輸出:無 數(shù)據(jù)接口:SPI 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:2.7 V ~ 5.5 V 電壓 - 電源，數(shù)字:1.7 V ~ 5.5 V INL/DNL（LSB）:±0.5，±0.5 架構(gòu):R-2R 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:16-WFQFN 裸露焊盤 供應(yīng)商器件封裝:16-WQFN（3x3） 標準包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。