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參數(shù)資料
| 型號(hào)： | DAC6574EVM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DAC6574 Evaluation Module(DAC6574評(píng)估模塊) |
| 中文描述： | DAC6574評(píng)估模塊（DAC6574評(píng)估模塊） |
| 文件頁數(shù)： | 32/39頁 |
| 文件大?。?/td> | 437K |
| 代理商： | DAC6574EVM |
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EVM Stacking
3-4
3.3
EVM Stacking
EVM stacking enables the designer to evaluate two DACx574s in tandem to
yield an eight channel output, or two DACx571s, or two DAC8571s. Any
combination of the seven may be used provided the outputs do not collide. A
maximum of two DACx574 EVMs are allowed since the output terminal, J4,
dictates the number of DAC channels that can be connected without colliding.
For the DACx571 and DAC8571, more than two EVMs can be stacked
together provided the I
2
C address of each stacked EVMs are unique, as the
outputs can be monitored through TP1 instead of shorting W2 jumper and
routing the DAC output to J4. Table 4 shows how the DAC output channels are
mapped into the output terminal, J4, with respect to the jumper position of W2,
W11, W12, and W13.
Table 3-4.DAC7571/DAC6571/DAC5571 Output Channel Mapping
Reference
Jumper
Position
1-2
Function
W2
U8 output (V
OUT
) is routed to J4-2.
U8 output (V
OUT
) is routed to J4-10.
2-3
Table 3-5.DAC8571 Output Channel Mapping
Reference
Jumper
Position
1-2
Function
W2
U4 output (V
OUT
) is routed to J4-2.
U4 output (V
OUT
) is routed to J4-10.
2-3
Table 3-6.DAC7574/DAC6574/DAC5574 Output Channel Mapping
Reference
Jumper
Position
1-2
Function
W2
U1 output A (V
OUT
A) is routed to J4-2.
U1 output A (V
OUT
A) is routed to J4-10.
U1 output B (V
OUT
B) is routed to J4-4.
U1 output B (V
OUT
B) is routed to J4-12.
U1 output C (V
OUT
C) is routed to J4-6.
U1 output C (V
OUT
C) is routed to J4-14.
U1 output D (V
OUT
D) is routed to J4-8.
U1 output D (V
OUT
D) is routed to J4-16.
2-3
W11
1-2
2-3
W12
1-2
2-3
W13
1-2
2-3
Each DAC EVM in a stacked configuration must have a unique I
2
C address.
This is accomplished by configuring the address jumpers W7 and W8 (refer
to the datasheet for I
2
C addressing) for the DACx574 EVM. The DACx571 and
DAC8571 use pullup and pulldown resistors R13, R22, R2, and R23
respectively. The table below shows the I
2
C address settings of each EVM.
The cells shaded in gray are factory preset and cannot be changed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC7574EVM | DAC7574 Evaluation Module(DAC7574評(píng)估模塊) |
| DAC5571EVM | DAC5571 Evaluation Module(DAC5571評(píng)估模塊) |
| DAC6571EVM | DAC6571 Evaluation Module(DAC6571評(píng)估模塊) |
| DAC7571EVM | DAC7571 Evaluation Module(DAC7571評(píng)估模塊) |
| DAC56 | Monolithic 16-Bit Resolution DIGITAL-TO-ANALOG CONVERTER |
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