參數(shù)資料
型號: DAC7612
英文描述: Dual, 12-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER
中文描述: 雙通道,12位串行輸入數(shù)字至模擬轉(zhuǎn)換器
文件頁數(shù): 11/12頁
文件大?。?/td> 126K
代理商: DAC7612
11
DAC7612
noise, and a set gain of 1.682V/V (4.095/2.435). See Figure
2 for an equivalent circuit schematic of the analog portion of
the DAC7612.
The output amplifier has a 7
μ
s typical settling time to
±
1
LSB of the final value. Note that there are differences in the
settling time for negative-going signals versus positive-
going signals.
The rail-to-rail output stage of the amplifier provides the full-
scale range of 0V to 4.095V while operating on a supply voltage
as low as 4.75V. In addition to its ability to drive resistive loads,
the amplifier will remain stable while driving capacitive loads
of up to 500pF. See Figure 3 for an equivalent circuit schematic
of the amplifier’s output driver and the Typical Performance
Curves section for more information regarding settling time,
load driving capability, and output noise.
POWER SUPPLY
A BiCMOS process and careful design of the bipolar and
CMOS sections of the DAC7612 result in a very low power
device. Bipolar transistors are used where tight matching
and low noise are needed to achieve analog accuracy, and
CMOS transistors are used for logic, switching functions
and for other low power stages.
If power consumption is critical, it is important to keep the
logic levels on the digital inputs (SDI, CLK, CS,
LOADDACS) as close as possible to either V
DD
or ground.
This will keep the CMOS inputs (see “Supply Current vs
Logic Input Voltages” in the Typical Performance Curves)
from shunting current between V
DD
and ground.
The DAC7612 power supply should be bypassed as shown
in Figure 1. The bypass capacitors should be placed as close
to the device as possible, with the 0.1
μ
F capacitor taking
priority in this regard. The “Power Supply Rejection vs
Frequency” graph in the Typical Performance Curves sec-
tion shows the PSRR performance of the DAC7612. This
should be taken into account when using switching power
supplies or DC/DC converters.
In addition to offering guaranteed performance with V
DD
in
the 4.75V to 5.25V range, the DAC7612 will operate with
reduced performance down to 4.5V. Operation between
4.5V and 4.75V will result in longer settling time, reduced
performance, and current sourcing capability. Consult the
“V
DD
vs Load Current” graph in the Typical Performance
Curves section for more information.
FIGURE 2. Simplified Schematic of Analog Portion.
FIGURE 3. Simplified Driver Section of Output Amplifier.
N-Channel
P-Channel
V
DD
V
OUT
GND
2R
2R
2R
R
2R
2R
R
R
1
R
R
2
Output Amplifier
R-2R DAC
Bandgap
Reference
2.435V
Typical of DAC A or DAC B
Buffer
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