參數(shù)資料
型號(hào): DAC7621EG4
廠商: Texas Instruments
文件頁(yè)數(shù): 2/14頁(yè)
文件大小: 0K
描述: IC 12-BIT D/A PARALLEL 20-SSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 70
設(shè)置時(shí)間: 7µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 5mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): 143k
其它名稱: DAC7621E
DAC7621E-ND
10
DAC7621
OUTPUT AMPLIFIER
A precision, low-power amplifier buffers the output of the
DAC section and provides additional gain to achieve a 0V
to 4.095V range. The amplifier has low offset voltage, low
noise, and a set gain of 1.682V/V (4.095/2.435). See Figure
2 for an equivalent circuit schematic of the analog portion
of the DAC7621.
The output amplifier has a 7
s typical settling time to ±1
LSB of the final value. Note that there are differences in the
settling time for negative-going signals versus positive-
going signals.
The rail-to-rail output stage of the amplifier provides the
full-scale range of 0V to 4.095V while operating on a
supply voltage as low as 4.75V. In addition to its ability to
drive resistive loads, the amplifier will remain stable while
driving capacitive loads of up to 500pF. See Figure 3 for an
equivalent circuit schematic of the amplifier’s output driver
and the Typical Performance Curves section for more infor-
mation regarding settling time, load driving capability, and
output noise.
POWER SUPPLY
A BiCMOS process and careful design of the bipolar and
CMOS sections of the DAC7621 result in a very low power
device. Bipolar transistors are used where tight matching
and low noise are needed to achieve analog accuracy, and
CMOS transistors are used for logic, switching functions
and for other low power stages.
If power consumption is critical, it is important to keep the
logic levels on the digital inputs (R/W, CLK, CS, LOADDAC,
CLR) as close as possible to either VDD or ground. This will
keep the CMOS inputs (see “Supply Current vs Logic Input
Voltages” in the Typical Performance Curves) from shunt-
ing current between VDD and ground.
The DAC7621 power supply should be bypassed as shown
in Figure 1. The bypass capacitors should be placed as close
to the device as possible, with the 0.1
F capacitor taking
priority in this regard. The “Power Supply Rejection vs
Frequency” graph in the Typical Performance Curves sec-
tion shows the PSRR performance of the DAC7621. This
should be taken into account when using switching power
supplies or DC/DC converters.
In addition to offering guaranteed performance with VDD in
the 4.75V to 5.25V range, the DAC7621 will operate with
reduced performance down to 4.5V. Operation between
4.5V and 4.75V will result in longer settling time, reduced
performance, and current sourcing capability. Consult the
“VDD vs Load Current” graph in the Typical Performance
Curves section for more information.
FIGURE 3. Simplified Driver Section of Output Amplifier.
N-Channel
P-Channel
V
DD
V
OUT
AGND
2R
R
2R
R
1
R
2
Output Amplifier
R-2R DAC
Bandgap
Reference
2.435V
Buffer
FIGURE 2. Simplified Schematic of Analog Portion.
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