參數(shù)資料
型號: DAC7724U
元件分類: 外設及接口
英文描述: Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
中文描述: 電可擦除可編程邏輯器件
文件頁數(shù): 3/15頁
文件大?。?/td> 451K
代理商: DAC7724U
3
DAC7724, 7725
SPECIFICATION (SINGLE SUPPLY)
At T
A
= –40
°
C to +85
°
C, V
CC
= +15V, V
DD
= +5V, V
SS
= GND, V
REFH
= +10V, V
REFL
= 0V, unless otherwise noted.
DAC7724N, U
DAC7725N, U
DAC7724NB, UB
DAC7725NB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
(1)
Linearity Matching
(3)
Differential Linearity Error
Monotonicity
Zero-Scale Error
Zero-Scale Drift
Zero-Scale Matching
(3)
Full-Scale Error
Full-Scale Matching
(3)
Power Supply Sensitivity
±
2
±
2
±
1
±
1
±
1
±
1
LSB
(2)
LSB
LSB
Bits
LSB
ppm/
°
C
LSB
LSB
LSB
ppm/V
T
MIN
to T
MAX
Code = 004
H
12
6
±
4
6
2
6
±
4
±
4
±
4
±
2
6
±
2
Code = FFF
H
At Full Scale
20
6
ANALOG OUTPUT
Voltage Output
(4)
Output Current
Load Capacitance
Short-Circuit Current
Short-Circuit Duration
V
REFL
±
5
V
REFH
6
6
6
V
mA
pF
mA
No Oscillation
500
±
20
6
6
6
To V
CC
or GND
Indefinite
REFERENCE INPUT
V
REFH
Input Range
V
REFL
Input Range
Ref High Input Current
Ref Low Input Current
V
REFL
+1.25
0
–0.3
–2.0
+10
6
6
6
6
6
6
6
6
V
V
V
REFH
– 1.25
1.5
0
mA
mA
DYNAMIC PERFORMANCE
Settling Time
(5)
Channel-to-Channel Crosstalk
Digital Feedthrough
Output Noise Voltage
To
±
0.012%, 10V Output Step
8
10
6
6
6
μ
s
LSB
nV-s
nV/
Hz
0.25
2
65
6
f = 10kHz
6
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels
V
IH
V
IL
V
OH
V
OL
Data Format
TTL-Compatible CMOS
6
I
IH
±
10
μ
A
I
IL
±
10
μ
A
I
OH
= –0.8mA
I
OL
= 1.6mA
2.4
–0.3
3.6
0.0
V
DD
+0.3
0.8
V
DD
0.4
6
6
6
6
6
6
6
6
V
V
V
V
Straight Binary
6
POWER SUPPLY REQUIREMENTS
V
DD
V
CC
I
DD
I
CC
Power Dissipation
+4.75
14.25
+5.25
15.75
6
6
6
6
6
6
V
V
μ
A
mA
mW
50
3.0
45
6
6
6
TEMPERATURE RANGE
Specified Performance
–40
+85
6
6
°
C
NOTES: (1) If V
= 0V, specification applies at code 004
and above. (2) LSB means Least Significant Bit, when V
equals +10V and V
equals 0V, then
one LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.
(5) Full-scale positive 10V step and negative step from code FFF
H
to 004
H
.
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