參數(shù)資料
型號: DAC8222FSZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 3/15頁
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL CMOS 24SOIC
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時間: 1µs
位數(shù): 12
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 1M
DAC8222
–11–
REV. C
Figure 25. Bipolar Configuration (Four-Quadrant Multiplication)
resistors R5, R6, R7, should be ratio-matched to 0.01% so that
gain error meets data sheet specifications. (Corresponding resis-
tors, R8, R9, and R10 for DAC B should also be matched to
0.01%). The resistors should have identical temperature coeffi-
cients if operating over the full temperature range.
Zero and full-scale are adjusted one of two ways and are at the
user’s discretion. Zero-output can be adjusted by first setting
the digital inputs to 1000 0000 0000 and adjusting R1 (R3 for
DAC B) so that VOUTA (or VOUT B) equals 0 V. If R1, R2 (R3,
R4 for DAC B) are omitted, then VOUT = 0 V can be adjusted
by varying R6, R7 (R9, R10 for DAC B) ratios. Full-scale is ad-
justed by setting the digital inputs to 1111 1111 1111 and vary-
ing R5 (R8 for DAC B). Full-scale can also be adjusted by
varying VREF. Full-scale output is equal to VREF minus one LSB.
Table III. Bipolar (Offset Binary) Code Table
(Refer to Figure 25)
Binary Number in
DAC Register
Analog Output, VOUT
MSB
LSB
(
DAC A or DAC B)
1111 1111 1111
+VREF
2047
2048
1000 0000 0001
+VREF
1
2048
1000 0000 0000
0 V
0111 1111 1111
–VREF
1
2048
0000 0000 0000
–VREF
2048
NOTE
1 LSB = (2
–11) (V
REF) =
1
2048
(VREF)
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