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參數(shù)資料
| 型號： | DAC8413EP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Quad, 12-Bit DAC Voltage Output with Readback |
| 中文描述： | QUAD, PARALLEL, WORD INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDIP28 |
| 封裝： | PLASTIC, MS-001, DIP-28 |
| 文件頁數(shù)： | 13/14頁 |
| 文件大小： | 443K |
| 代理商： | DAC8413EP |
DAC8412/DAC8413
–13–
REV. D
The 0.2
μ
F bypass capacitors shown at the reference inputs
in Figure 37 should be used whenever
±
10 V references are
used. Applications with single references or references to
±
5 V
may not require the 0.2
μ
F bypassing. The 6.2
resistor in series
with the output of the reference amplifier is to keep the amplifier
from oscillating with the capacitive load. We have found that this is
large enough to stabilize this circuit. Larger resistor values are
acceptable, provided that the drop across the resistor doesn
’
t
exceed a V
BE
. Assuming a minimum V
BE
of 0.6 V and a maxi-
mum current of 2.75 mA, then the resistor should be under
200
for the loading of a single DAC8412.
Using two separate references is not recommended. Having two
references could cause different drifts with time and tempera-
ture; whereas with a single reference, most drifts will track.
Unipolar positive full-scale operation can usually be set with a
reference with the correct output voltage. This is preferable to
using a reference and dividing down to the required value. For a
10 V full-scale output, the circuit can be configured as shown
in Figure 38. In this configuration the full-scale value is set first
by adjusting the 10 k
resistor for a full-scale output of 9.9976V.
0.1 F
//10 F
V
REFH
V
REFL
V
DD
V
SS
DAC8412
OR
DAC8413
10k
0.2 F
0.01 F
10 F
–
15V
GND
TRIM
OUTPUT
ZERO
TO
–
10V
OPERATION
REF08
Figure 38. Unipolar –10 V Operation
Figure 38 shows the DAC8412 configured for
–
10 V to 0 V
operation. A REF08 with a
–
10 V output is connected directly
to V
REFL
for the reference voltage.
Single +5 V Supply Operation
For operation with a +5 V supply, the reference voltage should be
set between 1.0 V and +2.5 V for optimum linearity. Figure
39 shows a REF43 used to supply a +2.5 V reference voltage.
The headroom of the reference and DAC are both sufficient to
support a +5 V supply with
±
5% tolerance. V
DD
and V
LOGIC
should be connected to the same supply. Separate bypassing
to each pin should also be used.
+5V
10 F
0.1 F
//10 F
0.01 F
10k
INPUT
OUTPUT
GND
TRIM
V
REFH
V
REFL
0.2 F
ZERO
TO
+2.5V
OPERATION
SINGLE
+5V
SUPPLY
REF43
DAC8412
OR
DAC8413
V
DD
V
SS
Figure 39. +5 V Single Supply Operation
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