參數(shù)資料
型號: DAC8420ES
廠商: Analog Devices Inc
文件頁數(shù): 1/24頁
文件大?。?/td> 0K
描述: IC DAC 12BIT QUAD SRL-OUT 16SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設(shè)置時間: 8µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
功率耗散(最大): 255mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應商設(shè)備封裝: 16-SOIC W
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 125k
Quad 12-Bit Serial
Voltage Output DAC
DAC8420
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
Guaranteed monotonic over temperature
Excellent matching between DACs
Unipolar or bipolar operation
Buffered voltage outputs
High speed serial digital interface
Reset-to-zero scale or midscale
Wide supply range, +5 V only to ±15 V
Low power consumption (35 mW maximum)
Available in 16-Lead PDIP, SOIC, and CERDIP packages
APPLICATIONS
Software controlled calibration
Servo controls
Process control and automation
ATE
FUNCTIONAL BLOCK DIAGRAM
9
GND
16
15
4
8
14
13
11
12
10
5
1
2
3
6
7
REG
D
DAC D
REG
C
DAC C
REG
B
DAC B
REG
A
DAC A
SHIFT
REGISTER
DECODE
SDI
CS
CLK
NC
LD
CLSEL CLR
VREFLO
VSS
VOUTA
VOUTB
VOUTC
VOUTD
VREFHI
VDD
12
4
2
00
27
5-
00
1
DAC8420
Figure 1.
GENERAL DESCRIPTION
The DAC8420 is a quad, 12-bit voltage-output DAC with serial
digital interface in a 16-lead package. Utilizing BiCMOS tech-
nology, this monolithic device features unusually high circuit
density and low power consumption. The simple, easy-to-use
serial digital input and fully buffered analog voltage outputs
require no external components to achieve a specified per-
formance.
The 3-wire serial digital input is easily interfaced to micro-
processors running at 10 MHz with minimal additional
circuitry. Each DAC is addressed individually by a 16-bit
serial word consisting of a 12-bit data word and an address
header. The user-programmable reset control CLR forces all
four DAC outputs to either zero scale or midscale,
asynchronously overriding the current DAC register values. The
output voltage range, determined by the inputs VREFHI and
VREFLO, is set by the user for positive or negative unipolar or
bipolar signal swings within the supplies, allowing considerable
design flexibility.
The DAC8420 is available in 16-lead PDIP, SOIC, and CERDIP
packages. Operation is specified with supplies ranging from
+5 V only to ±15 V, with references of +2.5 V to ±10 V, respec-
tively. Power dissipation when operating from ±15 V supplies is
less than 255 mW (maximum) and only 35 mW (maximum)
with a +5 V supply.
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