參數(shù)資料
型號: DAC8532
英文描述: Dual Channel, Low Power, 16-Bit, Serial Input DIGITAL-TO-ANALOG CONVERTER
中文描述: 雙通道,低功耗,16位,串行輸入數(shù)字到模擬轉(zhuǎn)換器
文件頁數(shù): 16/19頁
文件大?。?/td> 402K
代理商: DAC8532
DAC8532
SBAS246A
16
www.ti.com
The output voltage for any input code can be calculated as
follows:
V
X
V
D
R
R
R
V
R
R
OUT
REF
REF
=
+
65536
1
2
1
2
1
where D represents the input code in decimal (0
65535).
With V
REF
= 5V, R
1
= R
2
= 10k
:
V
X
D
V
OUT
=
10
65536
5
This is an output voltage range of
±
5V with 0000
H
corre-
sponding to a
5V output and FFFF
H
corresponding to a +5V
output. Similarly, using V
REF
= 2.5V, a
±
2.5V output voltage
range can be achieved.
LAYOUT
A precision analog component requires careful layout, ad-
equate bypassing, and clean, well-regulated power supplies.
The DAC8532 offers single-supply operation, and it will often
be used in close proximity with digital logic, microcontrollers,
microprocessors, and digital signal processors. The more
digital logic present in the design and the higher the switch-
ing speed, the more difficult it will be to keep digital noise
from appearing at the output.
FIGURE 11. Bipolar Operation with the DAC8532.
DAC8532
(Other pins omitted for clarity.)
V
DD
, V
REF
V
OUT
X
R
1
10k
R
2
10k
+5V
10
μ
F
0.1
μ
F
5V
±
5V
+5V
OPA703
Due to the single ground pin of the DAC8532, all return
currents, including digital and analog return currents for the
DAC, must flow through a single point. Ideally, GND would
be connected directly to an analog ground plane. This plane
would be separate from the ground connection for the digital
components until they were connected at the power entry
point of the system.
The power applied to V
DD
should be well regulated and low
noise. Switching power supplies and DC/DC converters will
often have high-frequency glitches or spikes riding on the
output voltage. In addition, digital components can create
similar high-frequency spikes as their internal logic switches
states. This noise can easily couple into the DAC output
voltage through various paths between the power connec-
tions and analog output.
As with the GND connection, V
DD
should be connected to a
positive power-supply plane or trace that is separate from the
connection for digital logic until they are connected at the
power entry point. In addition, a 1
μ
F to 10
μ
F capacitor in
parallel with a 0.1
μ
F bypass capacitor is strongly recom-
mended. In some situations, additional bypassing may be
required, such as a 100
μ
F electrolytic capacitor or even a
Pi
filter made up of inductors and capacitors
all designed
to essentially low-pass filter the supply, removing the high-
frequency noise.
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