參數(shù)資料
型號: DAC8551IDRBR
廠商: Texas Instruments, Inc.
英文描述: 16-BIT, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER
中文描述: 16位,超低毛刺電壓輸出數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 17/22頁
文件大?。?/td> 1740K
代理商: DAC8551IDRBR
www.ti.com
68HC11
(1)
PC7
SCK
MOSI
SYNC
SCLK
D
IN
(1)
NOTE: (1) Additional pins omitted for clarity.
DAC8551
APPLICATION INFORMATION
200 A
5 V
5 k
1.2 mA
(2)
USING THE REF02 AS A POWER SUPPLY
FOR THE DAC8551
Due to the extremely low supply current required by
the DAC8551, an alternative option is to use a REF02
+5 -V precision voltage reference to supply the re-
quired voltage to the device, as shown in
Figure 55
.
BIPOLAR OPERATION USING THE DAC8551
The DAC8551 has been designed for single-supply
operation, but a bipolar output range is also possible
using the circuit in
Figure 56
. The circuit shown gives
an output voltage range of
±
V
REF
. Rail-to-rail oper-
ation at the amplifier output is achievable using an
OPA703 as the output amplifier.
VO
VREF
D
65536
R1
R2
R1
VREF
R2
R1
REF02
Three-Wire
Serial
Interface
+5V
285
μ
A
V
OUT
= 0V to 5V
SYNC
SCLK
D
IN
+15
DAC8551
VO
10
65536
D
5 V
(4)
LAYOUT
A precision analog component requires careful layout,
adequate bypassing, and clean, well-regulated power
supplies.
DAC8551
SLAS429A–APRIL 2005–REVISED JULY 2005
valid on the falling edge of SCK. When data is being
transmitted to the DAC, the SYNC line is held LOW
(PC7). Serial data from the 68HC11 is transmitted in
8-bit bytes with only
eight
occurring in the transmit cycle. (Data is transmitted
MSB first.) In order to load data to the DAC8551,
PC7 is left LOW after the first eight bits are trans-
ferred, then a second and third serial write operation
is performed to the DAC. PC7 is taken HIGH at the
end of this procedure.
falling
clock
edges
Figure 54. DAC8551 to 68HC11 Interface
The 68HC11 should be configured so that its CPOL
bit is 0 and its CPHA bit is 1. This configuration
causes data appearing on the MOSI output to be
The
0.005%/mA, which results in an error of 299 μV for
the 1.2-mA current drawn from it. This corresponds to
a 3.9 LSB error.
load
regulation
of
the
REF02
is
typically
The output voltage for any input code can be calcu-
lated as follows:
where D represents the input code in decimal
(0–65535).
With V
REF
= 5 V, R1 = R2 = 10 k
.
Figure 55. REF02 as a Power Supply to the
DAC8551
This is especially useful if the power supply is quite
noisy or if the system supply voltages are at some
value other than 5 V. The REF02 outputs a steady
supply voltage for the DAC8551. If the REF02 is
used, the current it needs to supply to the DAC8551
is 200 μA. This is with no load on the output of the
DAC. When a DAC output is loaded, the REF02 also
needs to supply the current to the load. The total
typical current required (with a 5-k
load on the DAC
output) is:
This is an output voltage range of
±
5 V with 0000
H
corresponding to a –5 V output and FFFF
H
corre-
sponding to a 5 V output. Similarly, using V
REF
= 2.5
V, a
±
2.5-V output voltage range can be achieved.
The DAC8551 offers single-supply operation, and it
often is used in close proximity with digital logic,
17
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