參數(shù)資料
型號(hào)： DAC908E/2K5
元件分類： DAC
英文描述： PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDSO28
封裝： TSSOP-28
文件頁(yè)數(shù)： 10/15頁(yè)
文件大?。?/td> 180K
代理商： DAC908E/2K5
DAC908
4
Current
Sources
LSB
Switches
Segmented
MSB
Switches
+1.24V Ref.
Latches
8-Bit Data Input
D7.......D0
DAC908
FSA
BW
+V
D
+V
A
R
SET
AGND
CLK
DGND
REF
IN
0.1
F
INT/EXT
I
OUT
I
OUT
BYP
PD
20pF
50
50
20pF
1:1
0.1
F
0.1
F
+5V
(MSB) Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
(LSB) Bit 8
NC
(1)
NC
(1)
NC
(1)
NC
(1)
NC
(1)
NC
(1)
CLK
+V
D
DGND
NC
(1)
+V
A
BYP
I
OUT
I
OUT
AGND
BW
FSA
REF
IN
INT/EXT
PD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC908
NOTE: (1) NC pins should be left unconnected or grounded.
PIN
DESIGNATOR
DESCRIPTION
1
Bit 1
Data Bit 1 (D7), MSB
2
Bit 2
Data Bit 2 (D6)
3
Bit 3
Data Bit 3 (D5)
4
Bit 4
Data Bit 4 (D4)
5
Bit 5
Data Bit 5 (D3)
6
Bit 6
Data Bit 6 (D2)
7
Bit 7
Data Bit 7 (D1)
8
Bit 8
Data Bit 8 (D0), LSB
9
NC
No Connection
10
NC
No Connection
11
NC
No Connection
12
NC
No Connection
13
NC
No Connection
14
NC
No Connection
15
PD
Power Down, Control Input; Active
High. Contains internal pull-down circuit;
may be left unconnected if not used.
16
INT/EXT
Reference Select Pin; Internal (= 0) or
External (= 1) Reference Operation.
17
REF
IN
Reference Input/Ouput. See Applications
section for further details.
18
FSA
Full-Scale Output Adjust
19
BW
Bandwidth/Noise Reduction Pin:
Bypass with 0.1
F to +V
A for Optimum
Performance.
20
AGND
Analog Ground
21
I
OUT
Complementary DAC Current Output
22
I
OUT
DAC Current Output
23
BYP
Bypass Node: Use 0.1
F to AGND
24
+V
A
Analog Supply Voltage, 2.7V to 5.5V
25
NC
No Connection
26
DGND
Digital Ground
27
+V
D
Digital Supply Voltage, 2.7V to 5.5V
28
CLK
Clock Input
PIN DESCRIPTIONS
PIN CONFIGURATION
Top View
SO/TSSOP
TYPICAL CONNECTION CIRCUIT
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PDF描述
DAC908U/1K PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDSO28
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