LTC2492
28
2492fd
APPLICATIONS INFORMATION
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current is
zero, the common mode input current (IIN+ + IIN–)/2 is
proportional to the difference between the common mode
input voltage (VIN(CM)) and the common mode reference
voltage (VREF(CM)).
In applications where the input common mode voltage
is equal to the reference common mode voltage, as in
the case of a balanced bridge, both the differential and
common mode input currents are zero. The accuracy of
the converter is not compromised by settling errors.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between VIN(CM) and VREF(CM). For a reference
common mode voltage of 2.5V and an input common mode
of 1.5V, the common mode input current is approximately
0.74μA. This common mode input current does not degrade
the accuracy if the source impedances tied to IN+ and
IN– are matched. Mismatches in source impedance lead
to a xed offset error but do not effect the linearity or full
scale reading. A 1% mismatch in a 1k source resistance
leads to a 74μV shift in offset voltage.
In applications where the common mode input voltage
varies as a function of the input signal level (single-ended
type sensors), the common mode input current varies
proportionally with input voltage. For the case of balanced
input impedances, the common mode input current effects
arerejectedbythelargeCMRRoftheLTC2492,leadingtolittle
degradation in accuracy. Mismatches in source impedances
lead to gain errors proportional to the difference between
the common mode input and common mode reference.
1% mismatches in 1k source resistances lead to gain
errors on the order of 15ppm. Based on the stability of the
internal sampling capacitors and the accuracy of the internal
oscillator, a one-time calibration will remove this error.
In addition to the input sampling current, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA Max), results
in a small offset shift. A 1k source resistance will create a
1μV typical and a 10μV maximum offset voltage.
Reference Current
Similar to the analog inputs, the LTC2492 samples the
differential reference pins (REF+ and REF–) transferring
small amounts of charge to and from these pins, thus
producing a dynamic reference current. If incomplete
settling occurs (as a function the reference source
resistance and reference bypass capacitance) linearity
and gain errors are introduced.
For relatively small values of external reference capacitance
(CREF < 1nF), the voltage on the sampling capacitor settles
for reference impedances of many kΩ (if CREF = 100pF up
to 10kΩ will not degrade the performance) (see Figures
13 and 14).
Figure 13. +FS Error vs RSOURCE at VREF (Small CREF)
Figure 14. –FS Error vs RSOURCE at VREF (Small CREF)
RSOURCE (Ω)
0
+FS
ERROR
(ppm)
50
70
90
10k
2492 F13
30
10
40
60
80
20
0
–10
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
fO = GND
TA = 25°C
CREF = 0.01μF
CREF = 0.001μF
CREF = 100pF
CREF = 0pF
RSOURCE (Ω)
0
–FS
ERROR
(ppm) –30
–10
10
10k
2492 F14
–50
–70
–40
–20
0
–60
–80
–90
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
fO = GND
TA = 25°C
CREF = 0.01μF
CREF = 0.001μF
CREF = 100pF
CREF = 0pF