VIN ≥ FS" />
參數(shù)資料
型號(hào)： DC1012A-C
廠商： Linear Technology
文件頁(yè)數(shù)： 9/34頁(yè)
文件大小： 0K
描述： BOARD DELTA SIGMA ADC LTC2495
軟件下載： QuikEval System
設(shè)計(jì)資源： DC1012A Schematic
DC1012A Design File
標(biāo)準(zhǔn)包裝： 1
系列： Easy Drive™, QuikEval™
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 15
數(shù)據(jù)接口： I²C，串行
已用 IC / 零件： LTC2495
已供物品： 板
相關(guān)產(chǎn)品： LTC2495IUHF#TRPBF-ND - IC ADC 16BIT W/PGA 38-QFN
LTC2495CUHF#TRPBF-ND - IC ADC 16BIT W/PGA 38-QFN
LTC2495CUHF#PBF-ND - IC ADC 16BIT W/PGA 38-QFN
LTC2495IUHF#PBF-ND - IC ADC 16BIT W/PGA 38-QFN
LTC2495
2495fd
Table 2. LTC2495 Status Bits
Input Range
Bit 23
SIG
Bit 22
MSB
VIN ≥ FS
1
0V ≤ VIN < FS
1/0
0
–FS ≤ VIN < 0V
0
1
VIN < –FS
0
INPUT DATA FORMAT
The serial input word to the LTC2495 is 16 bits long and
is written into the device input register in two 8-bit words.
The first word (SGL, ODD, A2, A1, A0) is used to select
the input channel. The second word of data (IM, FA, FB,
SPD, GS2, GS1, GS0) is used to select the frequency
rejection, speed mode (1x, 2x), temperature measure-
ment and gain.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN+ = CH0, IN– =
CH1),thefrequencyrejectiontosimultaneous50Hz/60Hz,
and1xoutputrate(auto-calibrationenabled),andgain=1.
Thefirstconversionautomaticallybeginsatpower-upusing
thisdefaultconfiguration.Oncetheconversioniscomplete,
up to two words may be written into the device.
The first three bits of the first input word consist of two
preamble bits and one enable bit. Valid settings for these
three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data is ig-
nored(don’tcare)andthepreviouslyselectedinputchannel
and configuration remain valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
singleended(SGL=1).ForSGL=0,twoadjacentchannels
can be selected to form a differential input. For SGL = 1,
Figure 3a. Timing Diagram for Reading from the LTC2495
applications inForMation
Figure 3b. Timing Diagram for Writing to the LTC2495
SLEEP
DATA OUTPUT
ACK BY
LTC2497
ACK BY
MASTER
ALWAYS LOW
START BY
MASTER
NACK BY
MASTER
LSB
R
MSB
SGN
BIT 21
7
…
8
9
1
2
9
1
2
3
4
5
6
7
8
9
1
7-BIT
ADDRESS
2495 F03a
SCL
SDA
SLEEP
DATA INPUT
ACK BY
LTC2495
ACK
LTC2495
ACK
LTC2495
(OPTIONAL 2ND BYTE)
START BY
MASTER
SGL ODD
W
0
1
SCL
SDA
EN
A2
A1
A0
7
…
8
9
1
2
9
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
1
7-BIT ADDRESS
2495 F03b
IM
FA
EN2
FB SPD GS2 GS1 GS0
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DC-101-86-UL 制造商:Pan Pacific 功能描述:
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DC1018B-B 功能描述:DEMO BOARD FOR LT4356-2 RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP
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