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| 型號： | DC1561B |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR LTC4278 |
| 標準包裝： | 1 |
| 主要目的： | 電源管理，以太網(wǎng)供電（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4278 |
| 已供物品： | 板 |
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LTC4278
22
4278fc
compensation circuitry. The logic block also contains
circuitry to control the special dynamic requirements of
flyback control. For more information on the basics of
current mode switcher/controllers and isolated flyback
converters see Application Note 19.
Feedback Amplifier—Pseudo DC Theory
For the following discussion, refer to the simplified
Switching Regulator Feedback Amplifier diagram (Figure
10A).Whentheprimary-sideMOSFETswitchMPturnsoff,
itsdrainvoltagerisesabovetheVPORTPrail.Flybackoccurs
when the primary MOSFET is off and the synchronous
secondary MOSFET is on. During flyback the voltage on
nondriventransformerpinsisdeterminedbythesecondary
voltage. The amplitude of this flyback pulse, as seen on
the third winding, is given as:
VFLBK =
VOUT + ISEC ESR + RDS(ON)
(
)
NSF
RDS(ON) = on-resistance of the synchronous MOSFET MS
ISEC = transformer secondary current
ESR = impedance of secondary circuit capacitor, winding
and traces
NSF = transformer effective secondary-to-flyback winding
turns ratio (i.e., NS/NFLBK)
The flyback voltage is scaled by an external resistive
divider R1/R2 and presented at the FB pin. The feedback
amplifier compares the voltage to the internal bandgap
reference.Thefeedbackampisactuallyatransconductance
amplifier whose output is connected to VCMP only during
a period in the flyback time. An external capacitor on
the VCMP pin integrates the net feedback amp current to
provide the control voltage to set the current mode trip
point. The regulation voltage at the FB pin is nearly equal
to the bandgap reference VFB because of the high gain in
the overall loop. The relationship between VFLBK and VFB
is expressed as:
VFLBK =
R1
+R2
R2
VFB
APPLICATIONS INFORMATION
Combining this with the previous VFLBK expression yields
an expression for VOUT in terms of the internal reference,
programming resistors and secondary resistances:
VOUT =
R1+R2
R2
VFB NSF
ISEC ESR+RDS(ON)
(
)
The effect of nonzero secondary output impedance is
discussed in further detail (see Load Compensation
Theory).Thepracticalaspectsofapplyingthisequationfor
VOUT are found in subsequent sections of the Applications
Information.
Feedback Amplifier Dynamic Theory
So far, this has been a pseudo-DC treatment of flyback
feedback amplifier operation. But the flyback signal is a
pulse, not a DC level. Provision is made to turn on the
flyback amplifier only when the flyback pulse is present,
using the enable signal as shown in the timing diagram
(Figure 10b).
Minimum Output Switch On Time (tON(MIN))
The LTC4278 affects output voltage regulation via flyback
pulse action. If the output switch is not turned on, there
is no flyback pulse and output voltage information is
not available. This causes irregular loop response and
start-up/latchup problems. The solution is to require the
primary switch to be on for an absolute minimum time per
each oscillator cycle. To accomplish this the current limit
feedbackisblankedeachcyclefortON(MIN).Iftheoutputload
is less than that developed under these conditions, forced
continuous operation normally occurs. See subsequent
discussions in the Applications Information section for
further details.
Enable Delay Time (ENDLY)
The flyback pulse appears when the primary-side switch
shutsoff.However,ittakesafinitetimeuntilthetransformer
primary-side voltage waveform represents the output
voltage. This is partly due to rise time on the primary-
side MOSFET drain node, but, more importantly, is due
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