- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17066 > DC745A (Linear Technology)BOARD DELTA SIGMA ADC LTC2433-1 PDF資料下載
參數(shù)資料
| 型號(hào)： | DC745A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2433-1 |
| 軟件下載： | QuikEval System |
| 設(shè)計(jì)資源： | DC745A Design File DC745A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuikEval™ |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 6.8 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2433-1 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2433-1IMS#PBF-ND - IC ADC DIFF 16BIT 3WIRE 10-MSOP LTC2433-1CMS#TRPBF-ND - IC ADC DIFF 16BIT 3WIRE 10-MSOP LTC2433-1IMS#TRPBF-ND - IC ADC DIFF 16BIT 3WIRE 10-MSOP LTC2433-1CMS#PBF-ND - IC ADC DIFF 16BIT 3WIRE 10-MSOP LTC2433-1IMS#TR-ND - IC CONV A/D 16BIT DIFF 10-MSOP LTC2433-1CMS#TR-ND - IC CONV A/D 16BIT DIFF 10-MSOP LTC2433-1IMS-ND - IC CONV A/D 16BIT DIFF 10-MSOP LTC2433-1CMS-ND - IC ADC DIFF 16BIT 3WIRE 10-MSOP |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
LTC2433-1
12
24331fa
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
outside specifications but the following conversions will
not be affected. If the change occurs during the data output
state and the converter is in the Internal SCK mode, the
serial clock duty cycle may be affected but the serial data
stream will remain valid.
Table 3 summarizes the duration of each state and the
achievable output data rate as a function of FO.
SERIAL INTERFACE PINS
The LTC2433-1 transmits the conversion results and
receives the start of conversion command through a
synchronous 3-wire interface. During the conversion and
sleep states, this interface can be used to assess the
converter status and during the data output state it is used
to read the conversion result.
Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 9) is used to
synchronize the data transfer. Each bit of data is shifted out
the SDO pin on the falling edge of the serial clock.
In the Internal SCK mode of operation, the SCK pin is an
output and the LTC2433-1 creates its own serial clock by
dividing the internal conversion clock by 8. In the External
SCK mode of operation, the SCK pin is used as input. The
internal or external SCK mode is selected on power-up and
then reselected every time a HIGH-to-LOW transition is
detected at the CS pin. If SCK is HIGH or floating at power-
up or during this transition, the converter enters the inter-
nal SCK mode. If SCK is LOW at power-up or during this
transition, the converter enters the external SCK mode.
Serial Data Output (SDO)
The serial data output pin, SDO (Pin 8), provides the result
of the last conversion as a serial bit stream (MSB first)
during the data output state. In addition, the SDO pin is
used as an end of conversion indicator during the conver-
sion and sleep states.
When CS (Pin 7) is HIGH, the SDO driver is switched to a
high impedance state. This allows sharing the serial
interface with other devices. If CS is LOW during the
convert or sleep state, SDO will output EOC. If CS is LOW
during the conversion phase, the EOC bit appears HIGH on
the SDO pin. Once the conversion is complete, EOC goes
LOW.
Chip Select Input (CS)
The active LOW chip select, CS (Pin 7), is used to test the
conversion status and to enable the data output transfer as
described in the previous sections.
Table 3. LTC2433-1 State Duration
State
Operating Mode
Duration
CONVERT
Internal Oscillator
FO = LOW
147ms, Output Data Rate
≤ 6.8 Readings/s
Simultaneous 50Hz/60Hz Rejection
External Oscillator
FO = External Oscillator
20510/fEOSCs, Output Data Rate ≤ fEOSC/20510 Readings/s
with Frequency fEOSC kHz
(fEOSC/2560 Rejection)
SLEEP
As Long As CS = HIGH Until CS = LOW and SCK
DATA OUTPUT
Internal Serial Clock
FO = LOW
As Long As CS = LOW But Not Longer Than 1.09ms
(Internal Oscillator)
(19 SCK cycles)
FO = External Oscillator with
As Long As CS = LOW But Not Longer Than 152/fEOSCms
Frequency fEOSC kHz
(19 SCK cycles)
External Serial Clock with
As Long As CS = LOW But Not Longer Than 19/fSCKms
Frequency fSCK kHz
(19 SCK cycles)
APPLICATIO S I FOR ATIO
WU
UU
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RMM08DRXS | CONN EDGECARD 16POS DIP .156 SLD |
| SC75B-100 | INDUCTOR SMD 10UH 2.30A 2.52MHZ |
| RBM11DRAH | CONN EDGECARD 22POS R/A .156 SLD |
| CI160808-12NJ | INDUCTOR 12NH 300MA SMD |
| 0210490986 | CABLE JUMPER 1.25MM .030M 29POS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DC746A | 功能描述:BOARD DELTA SIGMA ADC LTC2412 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:QuikEval™ 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| DC74HC259 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:High Speed CMOS Logic 8-Bit Addressable Latch |
| DC-750 | 制造商:Bivar 功能描述:CARD GUIDE DEEP 7.5" 0.08" BK |
| DC-750-102 | 制造商:Bivar 功能描述:CARD GUIDE DEEP 7.5" 0.102" BK |
| DC-750-102-CI | 制造商:Bivar 功能描述:CARD GUIDE INSERT 7.5" 0.102" BK |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。