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參數(shù)資料
| 型號： | DG884DN-E3 |
| 廠商： | Vishay Siliconix |
| 文件頁數(shù)： | 10/14頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO MULTIPLEXER 8X4 |
| 標(biāo)準(zhǔn)包裝： | 300 |
| 功能： | 視頻交叉點開關(guān) |
| 電路： | 1 x 8:4 |
| 導(dǎo)通狀態(tài)電阻： | 90 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 18 V，±10 V ~ 15 V |
| 電流 - 電源： | 1.5mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
Document Number: 70071
S-71241–Rev. H, 25-Jun-07
www.vishay.com
5
Vishay Siliconix
DG884
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Specified
V+ = 15 V, V- = - 3 V
VL = 5 V, RS = 2.0 V
SALVO, CS, WR, I/O = 0.8 V
Tempb
Typc
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Unit
Mind
Maxd
Mind
Maxd
Unit
Power Supplies
Positive Supply Current
I+
All Inputs at GND or 2 V
RS = 2 V
Room
Full
1.5
3
6
3
6
mA
Negative Supply Current
I-
Room
Full
- 1.5
- 3
- 5
- 3
- 5
Digital GND
Supply Current
IDG
Full
- 275
- 750
μA
Logic Supply Current
IL
Full
200
500
Functional Operating
Supply Voltage Rangee
V+ to V-
See Operating Voltage Range
(Typical Characteristics) page 6
Full
13
20
13
20
V
V- to GND
Full
- 5.5
0
- 5.5
0
V+ to GND
Full
10
20
10
20
Minimum Input Timing Requirements
Address Write Time
tAW
See Figure 1
Full
20
50
ns
Minimum WR Pulse
Width
tWP
Full
50
100
Write Address Time
tWA
Full
- 10
10
Chip Select Write Time
tCW
Full
50
100
Write Chip Select Time
tWC
Full
25
75
Minimum SALVO
Pulse Width
tSP
Full
50
100
SALVO Write Time
tSW
Full
- 10
10
Write SALVOTime
tWS
Room
20
50
Input Output Time
tIO
Room
150
200
Address Output Time
tAO
Room
150
200
Chip Select Output Time
tCO
Room
150
200
Chip Select Address Time
tCA
Room
60
100
Reset to SALVO
tRS
Full
50
I/O Address Input Time
tIA
Room
50
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