參數(shù)資料
型號(hào): DIR1701E
英文描述: DIGITAL AUDIO INTERFACE RECEIVER
中文描述: 數(shù)字音頻接口接收機(jī)
文件頁數(shù): 10/19頁
文件大?。?/td> 290K
代理商: DIR1701E
DIR1701
SLAS331
APRIL 2001
10
www.ti.com
unlock flag minimum pulse width time
CASE-A when PLL is unlocked
When the PLL is unlocked, the UNLOCK flag pin is HIGH and the audio data output DOUT becomes LOW
(MUTE). The MUTE period, t
UNL
, is at least 200 ms. In this period, SCKO, BCKO, and LRCKO frequency hold
the latest tracked frequency.
If an S/PDIF signal is connected again in this unlock period, the bit rate is changed to the incoming signal
frequency, after at least 1 ms (before the UNLOCK flag goes LOW). The CKTRNS pin indicates validity of SCKO.
When CKTRNS is HIGH, the frequency of SCKO, BCKO, and LRCKO is in transition between states.
2
1
L
H
Mute
tUNL>200 ms
S/PDIF Signal Bit Rate
S/PDIF Signal Starts Again
New Bit Rate
tTRNS < 1 ms
UNLOCK
LRCKO
CKTRANS
BCKO
DOUT
Figure 5. UNLOCK Flag Minimum Pulse Width Time for PLL Unlocked
相關(guān)PDF資料
PDF描述
DIR1703 DIGITAL AUDIO INTERFACE RECEIVER
DIR1703E DIGITAL AUDIO INTERFACE RECEIVER
DISADVANTAGE Disadvantage of On-Chip Transient Protection (105k)
DISCONTINUEDPRODUCTS Discontinued Products - August 2. 1999
DISPLAY-XREF Optoelectronic
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