參數(shù)資料
型號: DIR1701E
英文描述: DIGITAL AUDIO INTERFACE RECEIVER
中文描述: 數(shù)字音頻接口接收機
文件頁數(shù): 5/19頁
文件大?。?/td> 290K
代理商: DIR1701E
DIR1701
SLAS331
APRIL 2001
5
www.ti.com
electrical characteristics, all specifications at T
A
= 25
°
C, V
CC
= V
DD
= 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
VIH (5)
VIL (5)
VIH2 (6)
VIL2 (6)
VIH3 (7)
VIL3 (7)
VOH (8)
VOL (8)
VOH (9)
VOL (9)
IIH(10)
IIL(10)
IIH(11)
IIL(11)
IIH(6)
IIL(6)
fs(12)
2
5.5
0.8
70%VDD
Input logic level
30%VDD
VDC
70%VDD
5.5
30%VDD
IO = 1 mA
IO =
2 mA
IO = 2 mA
IO =
4 mA
VIN = VDD
VIN = 0 V
VIN = VDD
VIN = 0 V
VIN = VDD
VIN = 0 V
VDD
0.4
0.5
Output logic level
VDD
0.4
VDC
0.5
100
10
10
65
10
10
100
10
10
32
μ
A
Input leakage current
65
10
10
96
Input sampling frequency
kHz
SCKO
System clock frequency
4.096
128/256/
384/512 fs
49.152
MHz
tj
SCKO clock jitter
SCKO duty cycle
80
ps RMS
50%
See
XTI clock accuracy
500
Table 3
500
ppm
S/PDIF INPUT
Duty cycle
Jitter
VIN = 1.5 V, fs = 96 kHz
VIN = 1.5 V
15%
85%
20
ns p-p
POWER SUPPLY REQUIREMENTS
VDD, VCC
Voltage range
ICC (VCC)
IDD (VDD)
PD
Power dissipation
POWER SUPPLY REQUIREMENTS
Operation temperature
θ
JA
Thermal resistance
NOTES:
5. TTL compatible, except pins 8, 20: XTI, DIN.
6. Pin 8: XTI (CMOS logic level).
7. Pin 20: DIN (CMOS logic level).
8. Pins 1
3, 9, 17
18, 27: ADFLG, BRATE0, BRATE1, CKTRNS, EMFLG, BFRAME, UNLOCK.
9. Pins 4, 10
12, 15
16: SCKO, LRCKO, BCKO, DOUT, CSBIT, URBIT.
10. Pins 13
14, 19
20, 25
26, 28: SCF0, SCF1, BRSEL, DIN, FMT0, FMT1, CKSEL.
11. Pin 21: RST
12. fs is defined as the incoming audio sampling frequency per channel.
13. No load connected to SCKO, LRCKO, BCKO, DOUT, CSBIT, URBIT. Power supply current varies according to the system clock
frequency.
3
3.3
3.4
26
100
3.6
4.7
36
VDC
Supply current (see Note 13)
mA
mW
25
85
°
C
28-pin SSOP
100
°
C/W
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DIR1703 DIGITAL AUDIO INTERFACE RECEIVER
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DISCONTINUEDPRODUCTS Discontinued Products - August 2. 1999
DISPLAY-XREF Optoelectronic
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