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參數(shù)資料
| 型號： | DM7473 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs(雙J-K主從觸發(fā)器（帶清除端和互補輸出）) |
| 中文描述： | 雙主從JK觸發(fā)器明確和互補輸出（雙JK主從觸發(fā)器（帶清除端和互補輸出）） |
| 文件頁數(shù)： | 3/3頁 |
| 文件大?。?/td> | 39K |
| 代理商： | DM7473 |
3
www.fairchildsemi.com
D
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM7473N | Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
| DM7474 | Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs(雙正邊緣觸發(fā)的D觸發(fā)器（帶預置、清除端和互補輸出）) |
| DM7474M | Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs |
| DM7474N | Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs |
| DM7476 | Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs(雙主從J-K觸發(fā)器(帶預置、清除端和互補輸出)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM7473J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| DM7473N | 功能描述:觸發(fā)器 Dl JK M/S Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM7473N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| DM7473N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| DM7474 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs |
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