參數(shù)資料
型號(hào): DM74ALS109A
廠(chǎng)商: Fairchild Semiconductor Corporation
英文描述: Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(雙正邊緣觸發(fā)的J-K觸發(fā)器(帶預(yù)置、清除端))
中文描述: 雙JK上升沿觸發(fā)器的預(yù)置和清除(雙正邊緣觸發(fā)的JK觸發(fā)器(帶預(yù)置,清除端))
文件頁(yè)數(shù): 4/6頁(yè)
文件大?。?/td> 55K
代理商: DM74ALS109A
www.fairchildsemi.com
4
D
Electrical Characteristics
over recommended operating free-air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25
°
C.
Symbol
Parameter
Note 4:
The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, I
OS
.
Note 5:
I
CC
is measured with J, K, CLK and PRESET grounded, then with J, K, CLK and CLEAR grounded.
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IK
V
OH
Input Clamp Voltage
V
CC
=
4.5V, I
I
=
18 mA
I
OH
=
400
μ
A
V
CC
=
4.5V to 5.5V
V
CC
=
4.5V
V
IH
=
2V
1.5
V
HIGH Level
Output Voltage
LOW Level
V
CC
2
V
V
OL
I
OL
=
4 mA
0.25
0.4
V
Output Voltage
I
OL
=
8 mA
0.35
0.5
V
I
I
Input Current at Max
V
CC
=
5.5V,
Clock, J, K
0.1
mA
Input Voltage
V
IH
=
7V
Preset, Clear
0.2
I
IH
High Level
V
CC
=
5.5V,
Clock, J, K
20
μ
A
Input Current
V
IH
=
2.7V
Preset, Clear
40
I
IL
Low Level
V
CC
=
5.5V,
Clock, J, K
0.2
mA
Input Current
V
IL
=
0.4V
V
CC
=
5.5V, V
O
=
2.25V
V
CC
=
5.5V (Note 5)
Preset, Clear
0.4
112
4
I
O
(Note 4)
I
CC
Output Drive Current
Supply Current
30
mA
mA
2.4
Conditions
From
To
Min
Max
Units
f
MAX
t
PLH
Maximum Clock Frequency
V
CC
=
4.5V to 5.5V
R
L
=
500
C
L
=
50 pF
34
MHz
Propagation Delay Time
LOW-to-HIGH Level Output
Preset or Clear
Q or Q
3
13
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Preset or Clear
Q or Q
5
15
ns
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Clock
Q or Q
5
16
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Clock
Q or Q
5
18
ns
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