參數(shù)資料
型號： DM74LS73AM
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 通用總線功能
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
中文描述： LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝： 0.150 INCH, MS-120, SOIC-14
文件頁數(shù)： 3/5頁
文件大?。?/td> 53K
代理商： DM74LS73AM
3
www.fairchildsemi.com
D
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 5:
All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 6:
Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs,
where shorting the outputs to ground may cause the outputs to change logic state, an equivalent test may be performed where V
O
=
2.125V with the mini-
mum and maximum limits reduced by one half from their stated values. This is very useful when using automatic test equipment.
Note 7:
With all outputs OPEN, I
CC
is measured with the Q and Q outputs HIGH in turn. At the time of measurement, the clock is grounded.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5)
V
I
V
OH
Input Clamp Voltage
HIGH Level
Output Voltage
V
CC
=
Min, I
I
=
18 mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max
V
I
=
7V
1.5
V
2.7
3.4
V
V
OL
LOW Level
Output Voltage
0.35
0.5
V
0.25
0.4
I
I
Input Current @ Max
Input Voltage
J, K
Clear
Clock
0.1
0.3
0.4
mA
I
IH
HIGH Level
Input Current
V
CC
=
Max
V
I
=
2.7V
J, K
Clear
Clock
20
60
80
0.4
0.8
0.8
100
6
μ
A
I
IL
LOW Level
Input Current
V
CC
=
Max
V
I
=
0.4V
J, K
Clear
Clock
mA
I
OS
I
CC
Short Circuit Output Current
Supply Current
V
CC
=
Max (Note 6)
V
CC
=
Max (Note 7)
20
mA
mA
4
From (Input)
R
L
=
2 k
Symbol
Parameter
To (Output)
C
L
=
15 pF
Min
30
C
L
=
50 pF
Min
25
Units
Max
Max
f
MAX
t
PHL
Maximum Clock Frequency
Propagation Delay Time
HIGH-to-LOW Level Output
MHz
Clear
to Q
20
28
ns
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
Clear
to Q
Clock to
20
24
ns
t
PLH
20
24
ns
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Q or Q
Clock to
Q or Q
t
PHL
20
28
ns
相關(guān)PDF資料
PDF描述
DM74LS73AN Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
DM74LS73AMX J-K-Type Flip-Flop
DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs(帶清零和互補(bǔ)輸出的雙負(fù)邊緣觸發(fā)的主-從J-K觸發(fā)器)
DM74LS74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
DM74LS74AM Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM74LS73AN 功能描述:觸發(fā)器 Dual J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
DM74LS74 WAF 制造商:Texas Instruments 功能描述:
DM74LS74A WAF 制造商:Fairchild Semiconductor Corporation 功能描述:
DM74LS74AM 功能描述:觸發(fā)器 Dl D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
DM74LS74AMX 功能描述:觸發(fā)器 Dl D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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