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參數(shù)資料
| 型號： | DM74S257 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 3-STATE Quad 1-of-2 Data Selector/Multiplexer |
| 中文描述： | 三態(tài)四1 - 2數(shù)據(jù)選擇器/復(fù)用器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 47K |
| 代理商： | DM74S257 |
2000 Fairchild Semiconductor Corporation
DS006482
www.fairchildsemi.com
August 1986
Revised May 2000
D
DM74S257
3-STATE Quad 1-of-2 Data Selector/Multiplexer
General Description
These Schottky-clamped high-performance multiplexers
feature 3-STATE outputs that can interface directly with
data lines of bus-organized systems. With all but one of the
common outputs disabled (at a high impedance state), the
low impedance of the single enabled output will drive the
bus line to a HIGH or LOW logic level. To minimize the pos-
sibility that two outputs will attempt to take a common bus
to opposite logic levels, the output enable circuitry is
designed such that the output disable times are shorter
than the output enable times.
This 3-STATE output feature means that n-bit (paralleled)
data selectors with up to 258 sources can be implemented
for data buses. It also permits the use of standard TTL reg-
isters for data retention throughout the system.
Features
I
3-STATE versions S157, S158, with same pin-outs
I
Schottky-clamped for significant improvement in
A-C performance
I
Provides bus interface from multiple sources in high-per-
formance systems
I
Average propagation delay from data input
I
Typical power dissipation
4.8 ns
320 mW
Ordering Code:
Connection Diagram
Function Table
H
=
HIGH Level
L
=
LOW Level
X
=
Don’t Care
Z
=
High Impedance (OFF)
Order Number
DM74S257N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Select
Output
Y
Output
Control
H
L
L
L
L
A
B
X
L
L
H
H
X
L
H
X
X
X
X
X
L
H
Z
L
H
L
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74S257N | 3-STATE Quad 1-of-2 Data Selector/Multiplexer |
| DM74S280 | 9-Bit Parity Generator/Checker |
| DM74S280M | 9-Bit Parity Generator/Checker |
| DM74S280N | 9-Bit Parity Generator/Checker |
| DM74S280MX | Parity Generator/Checker |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74S257 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S257J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DM74S257N | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Qd 3-STATE Sel/Mul RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| DM74S280 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S280J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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