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參數(shù)資料
| 型號： | DM9000E |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ISA TO ETHERNET MAC CONTROLLER WITH INTEGRATED 10/100 PHY |
| 中文描述： | ISA以以太網(wǎng)MAC控制器，它集成10/100網(wǎng)卡芯片 |
| 文件頁數(shù)： | 11/54頁 |
| 文件大?。?/td> | 575K |
| 代理商： | DM9000E |
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DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
Final
Version: DM9000-DS-F02
June 26, 2002
11
6. Vendor Control and Status Register Set
The DM9000 implements several control and status
registers, which can be accessed by the host. These CSRs
are byte aligned. All CSRs are set to their default values by
hardware or software reset unless they are specified
Register
Description
Offset
Default value
after reset
00H
00H
00H
00H
00H
00H
00H
00H
37H
38H
00H
00H
40H
XXH
XXH
00H
Determined by
EEPROM
XXH
01H
XXH
00H
00H
04H
0CH
0A46H
9000H
00H
00H
XXH
NCR
NSR
TCR
TSR I
TSR II
RCR
RSR
ROCR
BPTR
FCTR
FCR
EPCR
EPAR
EPDRL
EPDRH
WCR
PAR
Network Control Register
Network Status Register
TX Control Register
TX Status Register I
TX Status Register II
RX Control Register
RX Status Register
Receive Overflow Counter Register
Back Pressure Threshold Register
Flow Control Threshold Register
RX Flow Control Register
EEPROM & PHY Control Register
EEPROM & PHY Address Register
EEPROM & PHY Low Byte Data Register
EEPROM & PHY High Byte Data Register
Wake Up Control Register
Physical Address Register
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H-15H
MAR
GPCR
GPR
TRPAL
TRPAH
RWPAL
RWPAH
VID
PID
CHIPR
SMCR
MRCMDX
Multicast Address Register
General Purpose Control Register
General Purpose Register
TX SRAM Read Pointer Address Low Byte
TX SRAM Read Pointer Address High Byte
RX SRAM Write Pointer Address Low Byte
RX SRAM Write Pointer Address High Byte
Vendor ID
Product ID
CHIP Revision
Special Mode Control Register
Memory Data Read Command Without Address Increment
Register
Memory Data Read Command With Address Increment
Register
Memory Data Read_ address Register Low Byte
Memory Data Read_ address Register High Byte
Memory Data Write Command Without Address Increment
Register
Memory Data Write Command With Address Increment
Register
Memory Data Write_ address Register Low Byte
16H-1DH
1EH
1FH
22H
23H
24H
25H
28H-29H
2AH-2BH
2CH
2FH
F0H
MRCMD
F2H
XXH
MRRL
MRRH
MWCMDX
F4H
F5H
F6H
00H
00H
XXH
MWCMD
F8H
XXH
MWRL
FAH
00H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9006CJ | Gate Expander |
| DM9006CN | Gate Expander |
| DM9009CJ | Dual 4-input NAND Gate |
| DM9009CN | Dual 4-input NAND Gate |
| DM9002CN | Quad 2-input NAND Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9000E-H | 功能描述:以太網(wǎng)開發(fā)工具 ETHERNET CONTROLLER HEADER BRD 50x40mm RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| DM9000EP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:100; Interface Type:MII; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9000電路圖-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:型號DM9000電路圖1 |
| DM9000電路圖-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DM9000電路圖-2 |
| DM9002CJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate |
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