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參數(shù)資料
| 型號(hào)： | DM9602N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 諧振器 |
| 英文描述： | Dual Retriggerable, Resettable One Shots |
| 中文描述： | 96 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | DM9602N |
2000 Fairchild Semiconductor Corporation
DS006611
www.fairchildsemi.com
August 1986
Revised February 2000
D
DM9602
Dual Retriggerable, Resettable One Shots
General Description
These dual resettable, retriggerable one shots have two
inputs per function; one which is active HIGH, and one
which is active LOW. This allows the designer to employ
either leading-edge or trailing-edge triggering, which is
independent of input transition times. When input condi-
tions for triggering are met, a new cycle starts and the
external capacitor is allowed to rapidly discharge and then
charge again. The retriggerable feature permits output
pulse widths to be extended. In fact a continuous true out-
put can be maintained by having an input cycle time which
is shorter than the output cycle time. The output pulse may
then be terminated at any time by applying a LOW logic
level to the RESET pin. Retriggering may be inhibited by
either connecting the Q output to an active HIGH input, or
the Q output to an active LOW input.
Features
I
70 ns to
∞
output width range
I
Resettable and retriggerable—0% to 100% duty cycle
I
TTL input gating—leading or trailing edge triggering
I
Complementary TTL outputs
I
Optional retrigger lock-out capability
I
Pulse width compensated for V
CC
and temperature vari-
ations
Ordering Code:
Connection Diagram
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Don’t Care
Logic Diagrams
Order Number
DM9602N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Numbers
B
L
L
→
H
X
Operation
A
CLR
H
H
L
H
→
L
H
X
Trigger
Trigger
Reset
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