參數(shù)資料
型號: DM9801A
文件頁數(shù): 1/60頁
文件大?。?/td> 605K
代理商: DM9801A
DM9801A
1M Home Phoneline Network Physical Layer Single Chip Transceiver
Final
Version: DM9801A-DS-F01
May 30, 2001
1
General Description
The DM9801A is a physical-layer, single-chip, low-power
transceiver for 1M Home Phoneline Network applications.
On the media side, it provides an interface to a Home
Phoneline wiring system. The reconciliation layer interfaces
to the DM9801A either through an IEEE802.3u subset
Media Independent Interface (MII) or a pseudo-standard
General Purpose Serial Interface (GPSI). A management
interface is provided by MDIO/MDC when operating in MII
mode, or a Serial Peripheral Interface bus when operating in
GPSI mode.
The DM9801A uses a low-power and high-performance
CMOS process. It contains the entire physical layer
functions of 1M as defined by Home Phoneline Network
Alliance, Rev. 1.1, including the Physical Coding Sublayer,
(RLL25) Encoder/Decoder (ENC/DEC), 4-wire HN Driver
circuit and receiver analog front end (AFE).
Patent-Pending Circuitry Includes:
Enhanced 4-wire Home Network transceiver circuit.
Compatible with HomePNA 1M PHY specification version
1.1 and HomePNA certification document version 1.0
Block Diagram
HN
Secondary
Driver
Muxed
GPSI
or Mii
Interface
RLL25
Encoder
RLL25
Decoder
Master
PHY
Controller
Receiever
and
Digital PLL
Transmit
Timing
Generator
HN
Primary
Driver
Receiver
AFE
GPSI - MII
Transmit
GPSI - MII
Receive
HNA+/-
HNB+/-
Interface
Select
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