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參數(shù)資料
| 型號(hào)： | DMA2275 |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | DMA 2275, DMA 2286 C/D/D2-MAC Descrambler |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 19/48頁(yè) |
| 文件大?。?/td> | 217K |
| 代理商： | DMA2275 |
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DMA 2275, DMA 2286
19
8.4. DRAM Memory Map
8.4.1. Mode Register
Name
Address
Function
mode_register
0000
6*8 bit
access_mode
0000
8 bit
bit 0: video cond. access
bit 1: data1 cond. access
bit 2: data2 cond. access
bit 3: data3 cond. access
bit 4: data4 cond. access
bit 5: not used
bit 6: not used
bit 7: not used
(0 = free / 1 = conditional)
(0 = free / 1 = conditional)
(0 = free / 1 = conditional)
(0 = free / 1 = conditional)
(0 = free / 1 = conditional)
video_mode
0008
8 bit
bit 0: peaking select
bit 1: peaking
bit 2: baseband filter
bit 3: interpol. filter
bit 4: load coeff
bit 5: black out
bit 6: gray decoder
bit 7: line delay
(0 = low / 1 = high)
(1 = on)
(1 = on)
(1 = on)
(1 = now)
(1 = on)
(1 = on)
(1 = off)
scram_mode
0010
8 bit
bit 0: video descrambling
bit 1: video rotation
bit 2: aspect ratio
bit 3: vbi descrambling
bit 4: coeff clock
bit 5: not used
bit 6: not used
bit 7: user panning
(0 = on)
(0 = double / 1 = single)
(0 = 4:3 / 1 = 16:9)
(1 = on)
(1 = on)
(1 = on)
mac_mode
0018
8 bit
bit 3–0:
bit 4:
bit 5:
bit 6:
bit 7:
clamp position
clamp bypass
freq select
decoder sync
mac select
(1 = on)
(0 = 50 Hz / 1 = 60 Hz)
(1 = locked)
(0 = d2 / 1 = d)
pan_vector
0020
8 bit
bit 7–0:
user pan vector
(2’s complement)
pan_output
0028
8 bit
bit 7–0:
pan vector output
(2’s complement)
Edition: June 12, 1992
6251–330–1E
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