參數(shù)資料
型號(hào)： DP83957
文件頁(yè)數(shù)： 24/24頁(yè)
文件大?。?/td> 240K
代理商： DP83957
50 Functional Description (Continued)
SRAM MEMORY MAP
TLF12437 – 6
52 MANAGEMENT INTERFACE
The DP83957 interfaces with either one or two DP839502
devices to obtain the 7 bytes of network management sta-
tistics appended at the end of each packet on the manage-
ment bus (refer to DP83950 data sheet)
The management interface consists of the Management
Carrier
Sense
(MCRS)
Management
Receive
Clock
(MRXC) and the Management Data (MRXD) signals
The management interface signals connect directly to the
corresponding pins of the DP839502
521 Management Configuration
The attached DP839502 devices can be programmed to
have an active high or low Management Carrier Sense
(MCRS) signal
The MCRS
LEV bit (D0) of Configuration Register 3 is
used to select the active level of the MRCS signal from the
DP83950
If bit D0 e 0 then an active low MCRS signal is selected
If bit D0 e 1 then an active high MCRS is selected
The DP83952 can operate in a Secure or Non-Secure
(DP83950) mode When set in Secure mode it is possible
for the DP83952 to modify the 7 bytes of management
To cater for this the DP83957 must be programmed to ac-
cept the modified 7 bytes of management status
The SECURE bit (D7) of Configuration Register 2 is used to
specify the operating mode of the DP83952
If bit D7 e 0 then non-secure mode is selected If bit D7 e
1 then secure mode is selected
9
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