- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9532 > DS1050Z-25/T&R (Maxim Integrated Products)IC PWM 5-BIT 25KHZ 2-WIRE 8-SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | DS1050Z-25/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 11/17頁(yè) |
| 文件大小： | 0K |
| 描述： | IC PWM 5-BIT 25KHZ 2-WIRE 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 脈寬調(diào)制器（PWM） |
| PLL： | 無 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 25kHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)當(dāng)前第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
DS1050
3 of 17
The following bus protocol has been defined (see Figure 2).
§ Data transfer may be initiated only when the bus is not busy.
§ During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is high will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line from HIGH to LOW while the clock is HIGH,
defines a START condition.
Stop data transfer: A change in the state of the data line from LOW to HIGH while the clock line is
HIGH defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data. Figure 2 details how
data transfer is accomplished on the 2-wire bus. Depending upon the state of the R/W bit, two types of
data transfer are possible.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a
ninth bit.
Within the bus specifications, a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate)
are defined. The DS1050 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse that is associated with this
acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end of data to the slave
by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the master to generate the STOP condition.
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
master is the command/control byte. Next follows a number of data bytes. The slave returns an
“acknowledge” bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The first byte (the command/control
byte) is transmitted by the master. The slave then returns an acknowledge bit. Next follows a number
of data bytes transmitted by the slave to the master. The master returns an acknowledge bit after all
received bytes other than the last byte. At the end of the last received byte, a “not acknowledge” is
returned.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX3486ESA | IC TXRX RS485/422 2.5MBPS 8SOIC |
| DS1050Z-1/T&R | IC PWM 5-BIT 1KHZ 2-WIRE 8-SOIC |
| DS1050Z-10/T&R | IC PWM 5-BIT 10KHZ 2-WIRE 8-SOIC |
| DS1050P-5/T&R | IC PWM 5-BIT 5KHZ 2-WIRE 8-USOP |
| VI-2NN-IW-B1 | CONVERTER MOD DC/DC 18.5V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1050Z-5/T&R | 制造商:Maxim Integrated Products 功能描述:IC CLK PWM 5KHZ 1CIRC 8SOIC |
| DS1050Z-5/T&R | 功能描述:IC PWM 5-BIT 5KHZ 2-WIRE 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| DS1052 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:5-Bit, Programmable, 100kHz Pulse-Width Modulator |
| DS1052U-100 | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| DS1052U-100+ | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。