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參數(shù)資料
| 型號： | DS1267S-100+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 0K |
| 描述： | IC POT DUAL DIGITAL 100K 16-SOIC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 750 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線串口 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
DS1267
5 of 12
102199
The COUT output of the DS1267 can be used to drive the DQ input of another DS1267. When connecting
multiple devices, the total number of bits transmitted is always 17 times the number of DS1267s in the
daisy chain.
An optional feedback resistor can be placed between the COUT terminal of the last device and the first
DS1267 DQ input, thus allowing the controlling processor to read as well as write data or circularly clock
data through the daisy chain. The value of the feedback or isolation resistor should be in the range from 1
to 10 kohms.
When reading data via the COUT pin and isolation resistor, the DQ line is left floating by the reading
device. When RST is driven high, bit 17 is present on the COUT pin, which is fed back to the input DQ
pin through the isolation resistor. When the CLK input transitions low to high, bit 17 is loaded into the
first position of the I/O shift register and bit 16 becomes present on COUT and DQ of the next device. After
17 bits (or 17 times the number of DS1267s in the daisy chain), the data has shifted completely around
and back to its original position. When RST transitions to the low state to end data transfer, the value (the
same as before the read occurred) is loaded into the wiper-0, wiper-1, and stack select bit I/O register.
ABSOLUTE AND RELATIVE LINEARITY
Absolute linearity is defined as the difference between the actual measured output voltage and the
expected output voltage. Figure 5 presents the test circuit used to measure absolute linearity. Absolute
linearity is given in terms of a minimum increment or expected output when the wiper is moved one
position. In the case of the test circuit, a minimum increment (MI) or one LSB would equal 10/512 volts.
The equation for absolute linearity is given as follows:
(1)
ABSOLUTE LINEARITY
AL={VO (actual) - VO (expected)}/MI
Relative Linearity is a measure of error between two adjacent wiper position points and is given in terms
of MI by equation (2).
(2)
RELATIVE LINEARITY
RL={VO (n+1) - VO (n)}/MI
Figure 6 is a plot of absolute linearity and relative linearity versus wiper position for the DS1267 at 25°C.
The specification for absolute linearity of the DS1267 is ±0.75 MI typical. The specification for relative
linearity of the DS1267 is ±0.3 MI typical.
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