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參數(shù)資料
| 型號： | DS1339U-3 |
| 英文描述： | TRANS NPN BIPOL DUAL 160V SOT363 |
| 中文描述： | 串行實時時鐘 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 279K |
| 代理商： | DS1339U-3 |
DS1339 I
2
C Serial Real-Time Clock
13 of 18
Bit 2: Interrupt Control (INTCN).
This bit controls the relationship between the two alarms and the interrupt output
pins. When the INTCN bit is set to logic 1, a match between the timekeeping registers and the alarm 1 or alarm 2
registers activate the SQW/
INT
pin (provided that the alarm is enabled). When the INTCN bit is set to logic 0, a
square wave is output on the SQW/
INT
pin. This bit is set to logic 0 when power is first applied.
Bit 1: Alarm 2 Interrupt Enable (A2IE).
When set to a logic 1, this bit permits the Alarm 2 Flag (A2F) bit in the
status register to assert SQW/
INT
(when INTCN = 1). When the A2IE bit is set to logic 0 or INTCN is set to logic 0,
the A2F bit does not initiate an interrupt signal. The A2IE bit is disabled (logic 0) when power is first applied.
Bit 0: Alarm 1 Interrupt Enable (A1IE).
When set to logic 1, this bit permits the Alarm 1 Flag (A1F) bit in the
status register to assert SQW/
INT
(when INTCN = 1). When the A1IE bit is set to logic 0 or INTCN is set to logic 0,
the A1F bit does not initiate an interrupt signal. The A1IE bit is disabled (logic 0) when power is first applied.
STATUS REGISTER (0Fh)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
OSF
0
0
0
0
0
A2F
A1F
Bit 7: Oscillator Stop Flag (OSF).
A logic 1 in this bit indicates that the oscillator either is stopped or was stopped
for some period of time and may be used to judge the validity of the clock and date data. This bit is edge triggered
and is set to logic 1 when the oscillator stops. The following are examples of conditions that can cause the OSF bit
to be set:
1) The first time power is applied.
2) The voltage on both V
CC
and V
BACKUP
are insufficient to support oscillation.
3) The
EOSC
bit is turned off.
4) External influences on the crystal (e.g., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0. This bit can only be written to a logic 0.
Bit 1: Alarm 2 Flag (A2F).
A logic 1 in the Alarm 2 Flag bit indicates that the time matched the alarm 2 registers. If
the A2IE bit is a logic 1 and the INTCN bit is set to a logic 1, the SQW/
INT
pin is also asserted. A2F is cleared
when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value
unchanged.
Bit 0: Alarm 1 Flag (A1F).
A logic 1 in the Alarm 1 Flag bit indicates that the time matched the alarm 1 registers. If
the A1IE bit is a logic 1 and the INTCN bit is set to a logic 1, the SQW/
INT
pin is also asserted. A1F is cleared
when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value
unchanged.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1339U-3/T&R | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK SERL 8USOP - Tape and Reel |
| DS1339U-3+ | 功能描述:實時時鐘 I2C Serial RTC RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1339U-3+T&R | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK SERL 8USOP - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC RTC I2C W/ALARM 8-USOP |
| DS1339U-3+T&R | 功能描述:實時時鐘 I2C Serial RTC RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1339U33 | 制造商:Maxim Integrated Products 功能描述: |
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