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參數(shù)資料
| 型號(hào)： | DS1841X |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 15/17頁(yè) |
| 文件大小： | 0K |
| 描述： | IC RES LOG NV I2C DGTL 10TDFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接片： | 128 |
| 電阻（歐姆）： | 22k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±250 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 模具 |
| 供應(yīng)商設(shè)備封裝： | 模具 |
| 包裝： | 管件 |
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DS1841
Temperature-Controlled, NV, I2C,
Logarithmic Resistor
_______________________________________________________________________________________
7
LUT Adder Mode (Default)
LUT Adder Mode is selected by setting the Update
Mode bit to 1 and the Adder Mode bit to 1. This mode
operates similar to LUT Mode with one major difference
(see the
LUT Mode and LUT Adder Mode Block
Diagram). The WR is loaded with the sum of the values
of LUTVAL (the value pointed to by the address stored
in LUTAR) and IVR. Furthermore, in this mode, the val-
ues programmed into the LUT are signed two’s com-
plement. This allows convenient positive or negative
offsetting of the nominal IVR value. WR resistance val-
ues clamp at 00h and 7Fh (the MSB is ignored).
LUT Mode
LUT Mode is selected by setting the Update Mode bit
(Control Register 1, address 03h, bit 0) to a 1 and the
Adder Mode bit (Control Register 1, address 03h, bit 1)
to a 0. An overview of the DS1841 in this mode is illus-
trated in the
LUT Mode and LUT Adder Mode Block
Diagram. The memory map for the LUT Mode and the
LUT Adder Mode is shown in Table 2. The major differ-
ence between the two LUT modes is whether the value
in the IVR is added to the values stored in the LUT. The
dashed line/arrow shown in the
LUT Drive Mode Block
Diagram is not active in LUT Mode. When in LUT Mode,
on power-up the IVR value is recalled into the WR. This
value remains there until completion of the first temper-
ature conversion following power-up. The temperature
is measured every tFRAME. The temperature value is
used to calculate an index that points to the corre-
sponding value in the LUT. This index is referred to as
the LUT Address Register (LUTAR) and is located at
address 08h. The value stored in the LUT at the loca-
tion pointed to by LUTAR is called LUTVAL, and this
value is stored as the WR value (WR) at address 09h
when Update Mode bit = 1. The process then repeats
itself, continuously updating the wiper setting in a
closed-loop fashion. In this mode the 72-byte LUT is
populated with wiper settings for each two-degree tem-
perature window. Valid wiper settings are 00h to 7Fh
(the MSB is ignored). Table 3 shows the memory
addresses of the LUT as well as the corresponding
temperature range for each byte in the LUT.
Table 2. LUT Mode and LUT Adder Mode Memory Map
*In LUT Mode and LUT Adder Mode, WR is accessed through memory address 09h, while IVR remains at memory address 00h.
REGISTER
NAME
ADDRESS
(HEX)
VOLATILE/NV
FACTORY/POWER-UP
DEFAULT
IVR
Initial Value Register
00h
NV (Shadowed)
00h
CR0
Control Register 0
02h
Volatile
00h
CR1
Control Register 1
03h
NV (Shadowed)
03h
LUTAR
LUT Address Register
08h
Volatile
00h
WR
LUT Value Register
09h*
Volatile
00h
CR2
Control Register 2
0Ah
Volatile
00h
TEMP
Temperature Result
0Ch
Volatile (Read Only)
N/A
VOLTAGE
Supply Voltage Result
0Eh
Volatile
N/A
LUT
Temperature Lookup
Registers
80h–C7h
NV
00h
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| DS1842 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:76V, APD, Bias Output Stage with Current Monitoring |
| DS1842A | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:76V, APD, Bias Output Stage with Current Monitoring |
| DS1842AN+ | 功能描述:電流和電力監(jiān)控器、調(diào)節(jié)器 76V APD Bias Output Stage w/Current Mtr RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
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| DS1842AN+TR | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:76V, APD, Bias Output Stage with Current Monitoring |
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