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參數(shù)資料
| 型號： | DS1855E-050+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/21頁 |
| 文件大小： | 0K |
| 描述： | IC RES TEMP-CNTRL 10/50K 14TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 接片： | 100，256 |
| 電阻（歐姆）： | 10k，50k，100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 750 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
DS1855
12 of 21
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground
-0.3V to +6.0V
Operating Temperature Range -40°C to +85°C
Programming Temperature Range
0°C to +85°C
Storage Temperature Range
-55°C to +125°C
Lead Temperature (TSSOP only: soldering, 10s)
+300°C
Soldering Temperature (reflow)
TSSOP or CSBGA, Lead(Pb)-free
+260°C
TSSOP or CSBGA, Containing Lead(Pb)
+240°C
Flip Chip
+240°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of
time may affect device reliability.
Note: The DS1855 is built to the highest quality standards and manufactured for long-term reliability. All DS1855s
are made using the same quality materials and manufacturing methods. However, the DS1855 in the flip-chip
package is not exposed to environmental stresses, such as burn-in, that some industrial applications require. For
specific reliability information on this product, contact the factory.
RECOMMENDED DC OPERATING CONDITIONS
(TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL CONDITION
MIN
TYP
MAX
UNITS NOTES
Supply Voltage
VCC
+2.7
5.5
V
1
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.7V to 5.5V; TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL CONDITION
MIN
TYP
MAX
UNITS NOTES
Active Supply
Current
ICC
0.5
mA
11, 12
Input Leakage
ILI
-1
+1
A
Input Logic 1
VIH
0.7 x
VCC
VCC +
0.3
V
Input Logic 0
VIL
VGND -
0.3
0.3 x
VCC
V
Input Current Each
I/O Pin
0.4 < VI/O,
< 0.9 x VDD
-10
+10
A
3
Standby Current
ISTBY
3.0V
20
40
A
2
5.0V
30
60
Low-Level Output
Voltage (SDA)
VOL1
3mA sink
current
0.0
0.4
V
VOL2
6mA sink
current
0.0
0.6
V
I/O Capacitance
CI/O
10
pF
WP Internal Pullup
Resistance
RWP
40
65
100
k
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