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參數(shù)資料
型號(hào): DS1856B-M50+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 15/31頁(yè)
文件大?。?/td> 0K
描述: IC RES TEMP-CTRL 50/50K 16CSBGA
產(chǎn)品培訓(xùn)模塊: Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 50 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 2 線串口
電源電壓: 2.85 V ~ 5.5 V
工作溫度: -40°C ~ 95°C
安裝類型: 表面貼裝
封裝/外殼: 16-LBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 16-CSBGA(4x4)
包裝: 帶卷 (TR)
Dual, Temperature-Controlled Resistors with Inter-
nally Calibrated Monitors and Password Protection
22
Maxim Integrated
DS1856
Table Select
Reserved .................... <R-NA><W-all><00h>
PWE........................... <R-NA><W-all><FFFFFFFFh> Password Entry. There are two
passwords for the DS1856. The lower level password (PW1) has
all the access of a normal user plus those made available with PW1.
The higher level password (PW2) has all of the access of PW1
plus those made available with PW2. The value of the password reside
in EE inside of PW2 memory.
TBL Sel...................... <R-all/W-all><00h> Table Select. The upper memory tables of the
DS1856 are accessible by writing the correct table value in this register.
If the device is configured to have a Table 01h then writing a 00h ora
01h in this byte will access that table.
Config0
Mode.......................... <R-pw2/W-pw2><NV><03h>
a)
TEN.................... At Power-On this bit is HIGH, which enables autocontrol of the LUT.
If this bit is written to a ZERO then the resistor values are writeable by
the user and the LUT recalls are disabled. This allows the user to
interactively test their modules by manually writing resistor values. The
resistors will update with the new value at the end of the write cycle.
Thus both registers (Res0 and Res1) should be written in the same
write cycle. The 2-wire Stop condition is the end of the write cycle.
b)
AEN ................... At Power-On this bit is HIGH, which enables autocontrol of the LUT.
If this bit is cleared to a ZERO then the temperature calculated index
value ( T index ) is writeable by the user and the updates of calculated
indexes are disabled. This allows the user to interactively test their
modules by controlling the indexing for the look-up tables. The recalled
values from the LUTs will appear in the resistor registers after the next
completion of a temperature conversion (just like it would happen in
auto mode). Both pots will update at the same time (just like it would
happen in auto mode).
T Index....................... <R-pw2><W-pw2+AENb><00h> Holds the calculated index based on
the Temperature Measurement. This index is used for the address
during Look-up of Tables 4 and 5.
.
d)
VCC Lo .............. Low Warning Status for VCC measurement. This bit is set when the VCC
supply is below the POA trip point value. It clears itself when a VCC
measurement is completed and the value is above the low threshold.
e)
MON1 Hi........... High Warning Status for MON1 measurement.
f)
MON1 Lo .......... Low Warning Status for MON1 measurement.
g)
MON2 Hi........... High Warning Status for MON2 measurement.
h)
MON2 Lo .......... Low Warning Status for MON2 measurement.
Warning1 ................... <R-all><W-NA><00h> Low warning Status bits.
a)
MON3 HI........... High Warning Status for MON3 measurement.
b)
MON3 Lo........... Low Warning Status for MON3 measurement.
Register Descriptions (continued)
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