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| 型號(hào)： | DS1856B-M50+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 24/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RES TEMP-CTRL 50/50K 16CSBGA |
| 產(chǎn)品培訓(xùn)模塊： | Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 50 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 2 線串口 |
| 電源電壓： | 2.85 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 95°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-LBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 16-CSBGA（4x4） |
| 包裝： | 帶卷 (TR) |
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Dual, Temperature-Controlled Resistors with Inter-
nally Calibrated Monitors and Password Protection
30
Maxim Integrated
DS1856
Within the bus specifications, a standard mode
(100kHz clock rate) and a fast mode (400kHz clock
rate) are defined. The DS1856 works in both modes.
Acknowledge: Each receiving device, when addressed,
is obliged to generate an acknowledge after the byte has
been received. The master device must generate an
extra clock pulse, which is associated with this acknowl-
edge bit.
A device that acknowledges must pull down the SDA line
during the acknowledge clock pulse in such a way that
the SDA line is a stable low during the high period of the
acknowledge-related clock pulse. Setup and hold times
must be taken into account. A master must signal an end
of data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave. In
this case, the slave must leave the data line high to
enable the master to generate the STOP condition.
1)
Data transfer from a master transmitter to a
slave receiver. The first byte transmitted by the
master is the command/control byte. Next follows
a number of data bytes. The slave returns an
acknowledge bit after each received byte.
2)
Data transfer from a slave transmitter to a mas-
ter receiver. The master transmits the first byte
(the command/control byte) to the slave. The slave
then returns an acknowledge bit. Next follows a
number of data bytes transmitted by the slave to
the master. The master returns an acknowledge bit
after all received bytes other than the last byte. At
the end of the last received byte, a not acknowl-
edge can be returned.
The master device generates all serial clock pulses and
the START and STOP conditions. A transfer is ended with
a STOP condition or with a repeated START condition.
Since a repeated START condition is also the beginning
of the next serial transfer, the bus is not released.
The DS1856 can operate in the following two modes:
1)
Slave Receiver Mode: Serial data and clock are
received through SDA and SCL, respectively. After
each byte is received, an acknowledge bit is trans-
mitted. START and STOP conditions are recog-
nized as the beginning and end of a serial transfer.
Address recognition is performed by hardware
after the slave (device) address and direction bit
have been received.
2)
Slave Transmitter Mode: The first byte is
received and handled as in the slave receiver
mode. However, in this mode the direction bit
indicates that the transfer direction is reversed.
Serial data is transmitted on SDA by the DS1856,
while the serial clock is input on SCL. START and
STOP conditions are recognized as the beginning
and end of a serial transfer.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1856B-P50+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| DS1856B-P50+T&R | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
| DS1856E-002 | 功能描述:數(shù)字電位計(jì) IC RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲(chǔ)器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| DS1856E-002/R | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection |
| DS1856E-002/T | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors and Password Protection |
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