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| 型號(hào)： | DS21552LN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 99/137頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX T1 1-CHIP 5V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 單芯片收發(fā)器 |
| 接口： | E1，HDLC，J1，T1 |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 包括： | DSX-1 和 CSU 線路補(bǔ)償發(fā)生器，HDLC 控制器，帶內(nèi)回路代碼發(fā)生器和檢測(cè)器 |
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DS21352/DS21552
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0 = force the TCHBLK pin to remain low during this channel time
1 = force the TCHBLK pin high during this channel time
14. ELASTIC STORES OPERATION
The device contains dual two–frame (386 bits) elastic stores, one for the receive direction, and one for the
transmit direction. These elastic stores have two main purposes. First, they can be used to rate convert the
T1 data stream to 2.048 Mbps (or a multiple of 2.048 Mbps) which is the E1 rate. Secondly, they can be
used to absorb the differences in frequency and phase between the T1 data stream and an asynchronous
(i.e., not locked) backplane clock (which can be 1.544 MHz or 2.048 MHz). The backplane clock
(TSYSCLK and/or RSYSCLK) can burst at rates up to 8.192 MHz. Both elastic stores contain full
controlled slip capability which is necessary for this second purpose. The receive side elastic store can be
enabled via CCR1.2 and the transmit side elastic store is enabled via CCR1.7. Both elastic stores are fully
independent and no restrictions apply to the sourcing of the various clocks that are applied to them. The
transmit side elastic store can be enabled whether the receive elastic store is enabled or disabled and vice
versa. Also, each elastic store can interface to either a 1.544 MHz or 2.048 MHz backplane without
regard to the backplane rate the other elastic store is interfacing.
14.1 RECEIVE SIDE
If the receive side elastic store is enabled (CCR1.2=1), then the user must provide either a 1.544 MHz
(CCR1.3=0) or 2.048 MHz (CCR1.3=1) clock at the RSYSCLK pin. The user has the option of either
providing a frame/multiframe sync at the RSYNC pin (RCR2.3=1) or having the RSYNC pin provide a
pulse on frame boundaries (RCR2.3=0). If the user wishes to obtain pulses at the frame boundary, then
RCR2.4 must be set to zero and if the user wishes to have pulses occur at the multiframe boundary, then
RCR2.4 must be set to one. The framer will always indicate frame boundaries via the RFSYNC output
whether the elastic store is enabled or not. If the elastic store is enabled, then multiframe boundaries will
be indicated via the RMSYNC output. If the user selects to apply a 2.048 MHz clock to the RSYSCLK
pin, then the data output at RSER will be forced to all ones every fourth channel and the F–bit will be
passed into the MSB of TS0. Hence channels 1(bits 1-7), 5, 9, 13, 17, 21, 25, and 29 (timeslots 0(bits 1-
7), 4, 8, 12, 16, 20, 24, and 28) will be forced to a one . Also, in 2.048 MHz applications, the RCHBLK
output will be forced high during the same channels as the RSER pin. See Section 13 for more details.
This is useful in T1 to CEPT (E1) conversion applications. If the 386–bit elastic buffer either fills or
empties, a controlled slip will occur. If the buffer empties, then a full frame of data (193 bits) will be
repeated at RSER and the SR1.4 and RIR1.3 bits will be set to a one. If the buffer fills, then a full frame
of data will be deleted and the SR1.4 and RIR1.4 bits will be set to a one.
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相關(guān)代理商/技術(shù)參數(shù) |
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| DS21552LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21554 | 制造商:Maxim Integrated Products 功能描述: |
| DS21554G | 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS21554GN | 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS21554L | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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