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參數(shù)資料
| 型號(hào)： | DS21554LN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 80/124頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX E1 1-CHIP 5V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 單芯片收發(fā)器 |
| 接口： | E1，HDLC，J1，T1 |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 包括： | 遠(yuǎn)程和 AIS 警報(bào)檢測(cè)器 / 發(fā)生器 |
| 產(chǎn)品目錄頁(yè)面： | 1430 (CN2011-ZH PDF) |
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DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
59 of 124
9.2.2.
Transmit Side
Via the THSE control bit (CCR3.2), the DS21354/DS21554 can be set up to take the signaling data
presented at the TSIG pin and insert the signaling data into the PCM data stream that is being input at the
TSER pin. The hardware signaling insertion capabilities of each framer are available whether the
transmit-side elastic store is enabled or disabled. If the transmit-side elastic store is enabled, the
backplane clock (TSYSCLK) must be 2.048MHz/4.096MHz/8.192MHz.
When hardware signaling insertion is enabled on a framer (THSE = 1), then the user must enable the
Transmit Channel Blocking Register Function Select (TCBFS) control bit (CCR3.6 = 1). This is needed
so that the CAS multiframe alignment word, multiframe remote alarm, and spare bits can be added to
time slot 16 in frame 0 of the multiframe. The TS1 register should be programmed with the proper
information. If CCR3.6 = 1, then a zero in the TCBRs implies that signaling data is to be sourced from
TSER (or TSIG if CCR3.2 = 1) and a one implies that signaling data for that channel is to be sourced
from the Transmit Signaling (TS) registers. See definition below.
TCBR1/TCBR2/TCBR3/TCBR4: DEFINITION WHEN CCR3.6 = 1
(MSB)
(LSB)
CH18
CH3
CH17
CH2
CH16
CH1
1*
TCBR1(22)
CH22
CH7
CH21
CH6
CH20
CH5
CH19
CH4
TCBR2(23)
CH26
CH11
CH25
CH10
CH24
CH9
CH23
CH8
TCBR3(24)
CH30
CH15
CH29
CH14
CH28
CH13
CH27
CH12
TCBR4(25)
*These bits should be set to one to allow the internal TS1 register to create the CAS Multiframe Alignment Word and Spare/Remote Alarm bits.
The user can also take advantage of this functionality to intermix signaling data from the TSIG pin and
from the internal Transmit Signaling Registers (TS1 to TS16). As an example, assume that the user
wishes to source all the signaling data except for voice channels 5 and 10 from the TSIG pin. In this
application, the following bits and registers would be programmed as follows:
CONTROL BITS
REGISTER VALUES
THSE = 1 (CCR3.2)
TS1 = 0Bh (MF alignment word, remote alarm etc.)
TCBFS = 1 (CCR3.6)
TCBR1 = 03h (source time slot 16, frame 1 data)
T16S = 0 (TCR1.5)
TCBR2 = 01h (source voice Channel 5 signaling data from TS6)
CBR3 = 04h (source voice Channel 10 signaling data from TS11)
TCBR4 = 00h
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| DS21554LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2155DK | 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS2155G | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2155G/T&R | 制造商:Maxim Integrated Products 功能描述:DS2155 T1/E1/J1 SCT 100P CSBGA T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LIU T1/E1/J1 SCT 100P CSBGA 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs T1/E1/J1 Transceiver |
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