參數(shù)資料
型號(hào)： DS2172
英文描述： Bit Error Rate Tester BERT
中文描述： 位誤碼率測(cè)試器(BERT)
文件頁(yè)數(shù)： 2/21頁(yè)
文件大?。?/td> 213K
代理商： DS2172
DS2172
2 of 21
1.0 GENERAL OPERATION
1.1 PATTERN GENERATION
The DS2172 is programmed to generate a particular test pattern by programming the following registers:
-
Pattern Set Registers (PSR)
-
Pattern Length Register (PLR)
-
Polynomial Tap Register (PTR)
-
Pattern Control Register (PCR)
-
Error Insertion Register (EIR)
Please see Tables 4 and 5 for examples of how to program these registers in order to generate some
standard test patterns. Once these registers are programmed, the user will then toggle the TL (Transmit
Load) bit or pin to load the pattern into the onboard pattern generation circuitry and the pattern will begin
appearing at the TDATA pin.
1.2 PATTERN SYNCHRONIZATION
The DS2172 expects to receive the same pattern that it transmitted. The synchronizer examines the data at
RDATA and looks for characteristics of the transmitted pattern. The user can control the onboard
synchronizer with the Sync Enable and Resync bits in the Pattern Control Register.
In pseudorandom mode, the received pattern is tested to see if it fits the polynomial generator as defined
in the transmit side. For pseudorandom patterns, only the original pattern and an all ones pattern or an all
0s pattern will satisfy this test. Synchronization in pseudorandom pattern mode should be qualified by
using the RA1 and RA0 indicators in the Status Register. Synchronization is declared after 34 + n bits are
received without error, where n is the exponent in the polynomial from table 4. Once in synchronization
(SR0. = 1) any deviation from this pattern will be counted by the Bit Error Count Register.
In repetitive pattern mode a received pattern of the same length as being transmitted will satisfy this test.
Synchronization in repetitive pattern mode should be qualified by using the RA1 and RA0 indicators in
the Status Register and examining the Pattern Receive Register (PRR0--3). See section 10 for an
explanation of the Pattern Receive Register. Once in synchronization (SR.0 = 1) any deviation from this
pattern will be counted by the Bit Error Count Register.
1.3 BER CALCULATION
Users can calculate the actual Bit Error Rate (BER) of the digital communications channel by reading the
bit error count out of the Bit Error Count Register (BECR) and reading the bit count out of the Bit Count
Register (BCR) and then dividing the BECR value with the BCR value. The user has total control over
the integration period of the measurement. The LC (Load Count) bit or pin is used to set the integration
period.
1.4 GENERATING ERRORS
Via the Error Insertion Register (EIR), the user can intentionally inject a particular error rate into the
transmitted data stream. Injecting errors allows users to stress communication links and to check the
functionality of error monitoring equipment along the path.
1.5 POWER-UP SEQUENCE
On power-up, the registers in the DS2172 will be in a random state. The user must program all the
internal registers to a known state before proper operation can be insured.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2172T 功能描述:電信集成電路 Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS2172T/T&R 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:IC TESTER BIT ERROR RATE 32-TQFP 制造商:Maxim Integrated Products 功能描述:Telecom ICs Bit Error Rate Tester (BERT)
DS2172T/T&R+ 制造商:Maxim Integrated Products 功能描述:BERT 32P TQFP T&R LEAD FREE - Tape and Reel
DS2172T/T&R 功能描述:電信集成電路 Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS2172T+ 功能描述:電信集成電路 Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
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