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參數(shù)資料
| 型號(hào)： | DS2174QN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BERT ENHANCED 44-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 功能： | 增強(qiáng)型位誤碼率測試器（EBERT） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 50mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 包括： | 錯(cuò)誤計(jì)數(shù)器，樣式發(fā)生器和檢測器 |
DS2174
2 of 24
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TABLE OF CONTENTS
1.
GENERAL OPERATION ................................................................................................................4
1.1
PATTERN GENERATION......................................................................................................................4
1.1.1 Polynomial Generation.......................................................................................... 4
1.1.2 Repetitive Pattern Generation ............................................................................... 4
1.2
PATTERN SYNCHRONIZATION............................................................................................................5
1.2.1 Synchronization...................................................................................................... 5
1.2.2 Polynomial Synchronization .................................................................................. 5
1.2.3 Repetitive Pattern Synchronization ....................................................................... 5
1.3
BIT ERROR RATE (BER) CALCULATION............................................................................................5
1.3.1 Counters ................................................................................................................. 5
1.4
GENERATING ERRORS .......................................................................................................................5
1.5
CLOCK DISCUSSION...........................................................................................................................6
1.6
POWER-UP SEQUENCE.......................................................................................................................6
1.7
DETAILED PIN DESCRIPTION .............................................................................................................8
2.
PARALLEL CONTROL INTERFACE........................................................................................10
3.
CONTROL REGISTERS ...............................................................................................................11
3.1
MODE SELECT .................................................................................................................................13
3.1.1 Error Insertion ..................................................................................................... 13
3.2
STATUS REGISTER ...........................................................................................................................15
3.3
PSEUDORANDOM PATTERN REGISTERS ...........................................................................................15
3.4
TEST REGISTER................................................................................................................................17
3.5
COUNT REGISTERS ..........................................................................................................................17
4.
RAM ACCESS .................................................................................................................................18
4.1
INDIRECT ADDRESSING....................................................................................................................18
5.
DC OPERATION ............................................................................................................................19
6.
AC TIMING CHARACTERISTICS .............................................................................................20
6.1
PARALLEL PORT ..............................................................................................................................20
6.2
DATA INTERFACE ............................................................................................................................22
7.
MECHANICAL DIMENSIONS ....................................................................................................24
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2175SN+ | IC ELASTIC STORE T1/CEPT 16-SOIC |
| DS2176QN | IC BUFFER RECEIVE T1 IND 28-PLCC |
| DS2180AQN+T&R | IC TRANSCEIVER T1 44-PLCC |
| DS2181AQN+ | IC TXRX CEPT PRIMARY RATE 44PLCC |
| DS2186S/T&R | IC TRANSMIT LINE INTERFC 20-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2174QN/T&R+ | 制造商:Maxim Integrated Products 功能描述:BIT ERROR RATE TESTER 44PLCC - Tape and Reel |
| DS2174QN/T&R | 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2174QN+ | 功能描述:電信集成電路 Enhanced Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2174QN+T&R | 制造商:Maxim Integrated Products 功能描述:BIT ERROR RATE TESTER 44PLCC - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC BERT ENHANCED 44-PLCC 制造商:Maxim Integrated Products 功能描述:Telecom ICs Enhanced Bit Error Rate Tester (BERT) |
| DS2174QN+T&R | 功能描述:電信集成電路 Enhanced Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
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