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參數(shù)資料
| 型號： | DS2174QN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BERT ENHANCED 44-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 功能： | 增強(qiáng)型位誤碼率測試器（EBERT） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 50mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 包括： | 錯誤計(jì)數(shù)器，樣式發(fā)生器和檢測器 |
DS2174
17 of 24
3.4 Test Register
Test register used for factory test. All bits must be set to 0 for proper operation.
Test Register (Address = 9h)
(MSB)
(LSB)
TEST
SYMBOL
FUNCTION
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
TEST
Factory Use. Must be set to 0 for proper operation.
3.5 Count Registers
Note: Bit 2 of Control Register 4 determines if the addresses point to the bit count or error count registers.
The bit count registers comprise a 48-bit count of bits (actually RCLK cycles) received at RDAT. C47 is
the MSB of the 48-bit count. The bit counter increments for each cycle of RCLK when RCLK_EN is
high. The bit counter is enabled regardless of synchronization. The status register bit BCOF is set when
this 48-bit register overflows. The counter rolls over upon an overflow condition. The DS2174 latches the
bit count into the bit count registers and clears the internal bit count when the LC bit in Control Register 1
is toggled from low to high.
The error count registers comprise a 48-bit count of bits received in error at RDAT. The bit error counter
is disabled during loss-of-sync. C47 is the MSB of the 48-bit count. The status register bit BECOF is set
when this 48-bit register overflows. The counter rolls over upon an overflow condition. The DS2174
latches the bit count into the bit error count registers and clears the internal bit error count when the LC
bit in Control Register 1 is toggled from low to high.
The bit count and bit error count registers are used by an external processor to compute the BER
performance on a loop or channel basis.
Count Registers (Address = Ah–Fh)
(MSB)
(LSB)
C7
C6
C5
C4
C3
C2
C1
C0
C15
C14
C13
C12
C11
C10
C9
C8
C23
C22
C21
C20
C19
C18
C17
C16
C31
C30
C29
C28
C27
C26
C25
C24
C39
C38
C37
C36
C35
C34
C33
C32
C47
C46
C45
C44
C43
C42
C41
C40
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2175SN+ | IC ELASTIC STORE T1/CEPT 16-SOIC |
| DS2176QN | IC BUFFER RECEIVE T1 IND 28-PLCC |
| DS2180AQN+T&R | IC TRANSCEIVER T1 44-PLCC |
| DS2181AQN+ | IC TXRX CEPT PRIMARY RATE 44PLCC |
| DS2186S/T&R | IC TRANSMIT LINE INTERFC 20-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2174QN/T&R+ | 制造商:Maxim Integrated Products 功能描述:BIT ERROR RATE TESTER 44PLCC - Tape and Reel |
| DS2174QN/T&R | 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2174QN+ | 功能描述:電信集成電路 Enhanced Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2174QN+T&R | 制造商:Maxim Integrated Products 功能描述:BIT ERROR RATE TESTER 44PLCC - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC BERT ENHANCED 44-PLCC 制造商:Maxim Integrated Products 功能描述:Telecom ICs Enhanced Bit Error Rate Tester (BERT) |
| DS2174QN+T&R | 功能描述:電信集成電路 Enhanced Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
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