
DS2417
INTERRUPT TIMING Figure 11
Time
= 122 s
tINTERVAL
tPULSE
tLATENCY
VINT
Case A: Latency < 0.5
tINTERVAL
13 of 15
Case B: 0 < Latency <
tINTERVAL
Time
= 122 s
tINTERVAL
tPULSE
tLATENCY
VINT
The latency depends on the selected interrupt interval (IS0 to IS2 settings) and the contents of the RTC
counter at the time of writing the device control byte. In Case A, the flip-flop that determines the interval
duration is reset and toggles before half of the interval time is over. In Case B, this flip-flop is set that
generates an immediate interrupt pulse; the latency, therefore, can be up to one full interval duration.
If enabled, the interrupt pulse may also be triggered while reading from or writing to the control byte.