參數(shù)資料
型號： DS26324GN+
廠商： Maxim Integrated Products
文件頁數(shù)： 46/120頁
文件大小： 0K
描述： IC LIU 16CH T1/E1/J1 256CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 40
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 16/16
規(guī)程： LIN
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA，CSBGA
供應(yīng)商設(shè)備封裝： 256-CSBGA（17x17）
包裝： 托盤
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
31 of 120
5.6
Jitter Attenuator
The DS26324 contains an on-board jitter attenuator that can be set to a depth of either 32 or 128 bits via the JADS
bit in register GC. It can also be controlled on an individual LIU basis by settings in the IJAFDS register.
The 128-bit mode is used in applications where large excursions of wander are expected. The 32-bit mode is used
in delay sensitive applications. The characteristics of the attenuation are shown in Figure 5-9. The jitter attenuator
can be placed in either the receive path or the transmit path or none by appropriately setting the JAPS and the JAE
bits in register GC. These selections can be changed on an individual LIU basis by settings in the IJAPS and IJAE.
In order for the jitter attenuator to operate properly, a 2.048MHz clock or multiple thereof, or 1.544MHz clock or
multiple thereof, must be applied at MCLK. ITU-T specification G.703 requires an accuracy of ±50ppm for both T1
and E1 applications. AT&T Pub 62411 and ANSI specs require an accuracy of ±32ppm for T1 interfaces. On-board
circuitry adjusts either the recovered clock from the clock/data recovery block or the clock applied at the TCLK pin
to create a smooth jitter-free clock, which is used to clock data out of the jitter attenuator FIFO. It is acceptable to
provide a jittery clock at the TCLK pin if the jitter attenuator is placed on the transmit side. If the incoming jitter
exceeds either 120UIP-P (buffer depth is 128 bits) or 28UIP-P (buffer depth is 32 bits), the DS26324 will divide the
internal nominal 32.768MHz (E1) or 24.704MHz (T1) clock by either 15 or 17 instead of the normal 16 to keep the
buffer from overflowing. When the device divides by either 15 or 17, it also sets the jitter attenuator limit trip
(IJAFLT) bits in the IJAFLT register described.
Figure 5-9. Jitter Attenuation
FREQUENCY (Hz)
0dB
-20dB
-40dB
-60dB
1
10
100
1K
10K
JITTER
ATTENUAT
ION
(d
B)
100K
TR 62411 (Dec. 90)
Prohibited Area
C
ur
ve
B
C
ur
ve
A
ITU G.7XX
Prohibited Area
TBR12
Prohibited
Area
T1
E1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26324GN+ 功能描述:電信集成電路 3.3V E1/T1/J1 16Ch Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GN+T&R 制造商:Maxim Integrated Products 功能描述:X16 T1E1J1 S-H LIU CSBGA IND LF T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LIU E1/T1/J1 3.3V 256-CSBGA
DS26324GN+T&R 功能描述:電信集成電路 3.3V E1/T1/J1 16Ch Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GNA2 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GNA2+ 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
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