參數(shù)資料
型號: DS26324GN+
廠商: Maxim Integrated Products
文件頁數(shù): 81/120頁
文件大?。?/td> 0K
描述: IC LIU 16CH T1/E1/J1 256CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 16/16
規(guī)程: LIN
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA,CSBGA
供應(yīng)商設(shè)備封裝: 256-CSBGA(17x17)
包裝: 托盤
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
63 of 120
Register Name:
ADDP
Register Description:
Address Pointer for Bank Selection
Register Address (LIUs 1–8):
1Fh
Register Address (LIUs 9–16):
3Fh
Bit #
7
6
5
4
3
2
1
0
Name
ADDP7
ADDP6
ADDP5
ADDP4
ADDP3
ADDP2
ADDP1
ADDP0
Default
0
Bits 7 to 0: Address Pointer (ADDP). This pointer is used to switch between pointing to the primary registers, the
secondary registers, individual registers, and BERT registers. See Table 6-14 for bank selection. The register
space contains control for Channels 1 to 8 from address 00 hex to 1F hex and a duplicate set of registers for
control of Channels 9 to 16 from address 20 hex to 3F hex. The ADDP at address 1F hex select the banks for the
set of registers for LIUs 1–8. The ADDP register at address 3F select the banks for the set of registers for LIUs 9–
16.
Table 6-14. Address Pointer Bank Selection
ADDP[7:0] (HEX)
BANK NAME
00
Primary Bank
AA
Secondary Bank
01
Individual LIU Bank
02
BERT Bank
6.1.2
Secondary Register Bank
The ADDP register must be set to AAh in order to access this bank.
Register Name:
SRMS
Register Description:
Single-Rail Mode Select
Register Address (LIUs 1–8):
00h
Bit #
7
6
5
4
3
2
1
0
Name
SRMS8
SRMS7
SRMS6
SRMS5
SRMS4
SRMS3
SRMS2
SRMS1
Default
0
Register Address (LIUs 9–16):
20h
Bit #
7
6
5
4
3
2
1
0
Name
SRMS16
SRMS15
SRMS14
SRMS13
SRMS12
SRMS11
SRMS10
SRMS9
Default
0
Bits 7 to 0: Single-Rail Mode Select Channel n (SRMSn). When this bit is set single-rail mode is selected for the
system transmit and receive n. If this bit is reset, dual-rail is selected.
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